IP Library Granted Patent US 8,548,011
Granted Patent B2
US 8,548,011 · App. 12/959,239 · Granted Oct 1, 2013

Dynamic host clock compensation

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,548,011
App. No.
12/959,239
Granted
Oct 1, 2013
Kind
B2
Abstract

In accordance with a first embodiment of the present invention, a method for improving synchronization of communications between a first port and a second port is provided, the method performed at the first port and comprising: inserting skip symbols into a transmission stream for transmissions from the first port to the second port, wherein the skip symbols are inserted at a first average frequency level; detecting a lack of synchronization between the first port and the second port; and inserting skip symbols into the transmission stream at a second average frequency level greater than the first average frequency level in response to the detecting.

Claims (47)

1. A method for improving synchronization of communications between a first port and a second port, the method performed at the first port and comprising:

inserting skip symbols into a transmission stream for transmissions from the first port to the second port, wherein the skip symbols are inserted at a first average frequency level;

detecting a lack of synchronization between the first port and the second port associated with a clock rate variance being greater than a standard tolerance accommodated by the first average frequency level; and

inserting skip symbols into the transmission stream at a second average frequency level greater than the first average frequency level in response to the detecting;

wherein an average skip symbol frequency is increased from the first average frequency level to the second average frequency level when the clock rate variance between the first port and the second port is greater than the standard tolerance.

2. The method of claim 1 , wherein the detecting includes detecting a number of recovery requests generated by the second port, the number of link recovery requests exceeding a predefined threshold.

3. The method of claim 1 , wherein the detecting includes detecting a number of recovery requests generated by the second port, the number of link recovery requests exceeding a predefined threshold in a particular period of time.

4. The method of claim 1 , further comprising:

detecting another lack of synchronization between the first port and the second port;

inserting skip symbols into the transmission stream at a third average frequency level greater than the second average frequency level in response to the detecting another lack of synchronization.

5. A method for improving synchronization of communications between a first port and a second port, the method performed at the first port and comprising:

inserting skip symbols into a transmission stream for transmissions from the first port to the second port, wherein the skip symbols are inserted at a first average frequency level compliant with the USB 3.0 specification;

detecting a lack of synchronization between the first port and the second port resulting from a variance in clock rates being greater than a standard tolerance accommodated by the first average frequency level; and

inserting skip symbols into the transmission stream at a second average frequency level greater than the first average frequency level in response to the detecting;

wherein the transmission stream is a USB 3.0 transmission stream and an average skip symbol frequency is increased from the first average frequency level to the second average frequency level to compensate for reference clocks being non-compliant with the USB 3.0 specification on either end of the link between the first port and the second port.

6. A method for improving synchronization of communications between a first port and a second port, the method performed at the first port and comprising:

inserting skip symbols into a transmission stream for transmissions from the first port to the second port, wherein the skip symbols are inserted at a first average frequency level compliant with the PCIe specification;

detecting a lack of synchronization between the first port and the second port; and

inserting skip symbols into the transmission stream at a second average frequency level greater than the first average frequency level in response to the detecting;

wherein the transmission stream is a PCIe transmission stream and an average skip symbol frequency is increased from the first average frequency level to the second average frequency level to compensate for reference clocks being non-compliant with the PCIe specification on either end of the link between the first port and the second port.

7. The method of claim 2 , further comprising monitoring packets transmitted in the transmission stream to determine if alternative reasons than lack of synchronization are responsible for one or more of the link recovery requests.

8. The method of claim 1 , wherein the skip symbols are part of a skip ordered set.

9. An apparatus comprising:

a transmission buffer configured to receive transmission packets;

a multiplexer coupled to the transmission buffer and configured to:

insert skip symbols into a transmission stream for transmissions, wherein the skip symbols are inserted at a first average frequency level;

detect a lack of synchronization between the apparatus and a receiver resulting from a variance in clock rates being greater than a standard tolerance accommodated by the first average frequency level; and

insert skip symbols into the transmission stream at a second average frequency level greater than the first average frequency level in response to the detecting; and

a transmitter coupled to the multiplexer and configured to transmit the transmission stream to the receiver;

wherein an average skip symbol frequency is increased from the first average frequency level to the second average frequency level when the variance in clock rates between the first port and the second port is greater than the standard tolerance.

10. The apparatus of claim 9 , further comprising an 8b/10b encoder coupled to the multiplexer and to the transmitter and configured to encode the transmission stream prior to it being transmitted.

11. The apparatus of claim 9 , further comprising a parallel-to-serial converter coupled to the multiplexer and to the transmitter and configured to convert the transmission stream from parallel to serial form prior to it being transmitted.

12. The apparatus of claim 9 , further comprising a byte striper coupled to the multiplexer configured to stripe the transmission stream into multiple lanes.

13. A first port for improving synchronization of communications between the first port and a second port, the first port comprising:

means for inserting skip symbols into a transmission stream for transmissions from the first port to the second port, wherein the skip symbols are inserted at a first average frequency level;

means for detecting a lack of synchronization between the first port and the second port resulting from a variance in clock rates being greater than a standard tolerance accommodated by the first average frequency level; and

means for inserting skip symbols into the transmission stream at a second average frequency level greater than the first average frequency level in response to the detecting;

wherein an average skip symbol frequency is increased from the first average frequency level to the second average frequency level when the variance in clock rates between the first port and the second port is greater than the standard tolerance.

14. The first port of claim 13 , wherein the detecting includes detecting a number of recovery requests generated by the second port, the number of link recovery requests exceeding a predefined threshold.

15. The first port of claim 13 , wherein the means for detecting includes means for detecting a number of recovery requests generated by the second port, the number of link recovery requests exceeding a predefined threshold in a particular period of time.

16. The first port of claim 13 , further comprising:

means for detecting another lack of synchronization between the first port and the second port;

means for inserting skip symbols into the transmission stream at a third average frequency level greater than the second average frequency level in response to the detecting another lack of synchronization.

17. The first port of claim 13 , wherein the transmission stream is a USB 3.0 transmission stream.

18. The first port of claim 13 , wherein the transmission stream is a PCIe transmission stream.

19. The first port of claim 14 , further comprising means for monitoring packets transmitted in the transmission stream to determine if alternative reasons than lack of synchronization are responsible for one or more of the link recovery requests.

20. The first port of claim 13 , wherein the skip symbols are part of a skip ordered set.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 034069-0494) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: PLX TECHNOLOGY, INC.
Reel/Frame 037682/0802 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2015
From: PLX TECHNOLOGY, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035615/0767 →
PATENT SECURITY AGREEMENT Recorded Oct 28, 2014
From: PLX TECHNOLOGY, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 034069/0494 →