Semiconductor device and electronic device
An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 μm is 1 aA or less.
1. A semiconductor device comprising:
a first transistor; and
a second transistor,
wherein a first terminal of the first transistor is electrically connected to a first wiring and a second terminal of the first transistor is electrically connected to a second wiring,
wherein a gate of the second transistor is electrically connected to a third wiring, a first terminal of the second transistor is electrically connected to the third wiring, and a second terminal of the second transistor is electrically connected to a gate of the first transistor,
wherein each of the first transistor and the second transistor comprises an oxide semiconductor layer comprising a channel region, and
wherein an off-state current of each of the first transistor and the second transistor per channel width of 1 μm is 1 aA or less.
2. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer includes a non-single-crystal region.
3. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer includes a non-single-crystal region, the non-single crystal region has a c-axis alignment in a direction perpendicular to a surface of the oxide semiconductor layer.
4. An electronic device comprising:
the semiconductor device according to claim 1 ; and
an operation switch.
5. A semiconductor device comprising:
a first transistor;
a second transistor;
a third transistor; and
a fourth transistor,
wherein a first terminal of the first transistor is electrically connected to a first wiring and a second terminal of the first transistor is electrically connected to a second wiring,
wherein a gate of the second transistor is electrically connected to a third wiring, a first terminal of the second transistor is electrically connected to the third wiring, and a second terminal of the second transistor is electrically connected to a gate of the first transistor,
wherein a gate of the third transistor is electrically connected to a fourth wiring, a first terminal of the third transistor is electrically connected to a fifth wiring, and a second terminal of the third transistor is electrically connected to the second wiring,
wherein a gate of the fourth transistor is electrically connected to the fourth wiring, a first terminal of the fourth transistor is electrically connected to the fifth wiring, and a second terminal of the fourth transistor is electrically connected to the gate of the first transistor,
wherein each of the first to fourth transistors comprises an oxide semiconductor layer comprising a channel region, and
wherein an off-state current of each of the first to fourth transistors per channel width of 1 μm is 1 aA or less.
6. The semiconductor device according to claim 5 , wherein the oxide semiconductor layer includes a non-single-crystal region.
7. The semiconductor device according to claim 5 , wherein the oxide semiconductor layer includes a non-single-crystal region, the non-single crystal region has a c-axis alignment in a direction perpendicular to a surface of the oxide semiconductor layer.
8. An electronic device comprising:
the semiconductor device according to claim 5 ; and
an operation switch.
9. A semiconductor device comprising:
a first transistor and a second transistor,
wherein a first terminal of the first transistor is electrically connected to a first wiring and a second terminal of the first transistor is electrically connected to a second wiring,
wherein a gate of the second transistor is electrically connected to the first wiring, a first terminal of the second transistor is electrically connected to the first wiring, and a second terminal of the second transistor is electrically connected to a gate of the first transistor,
wherein each of the first transistor and the second transistor comprises an oxide semiconductor layer comprising a channel region, and
wherein an off-state current of each of the first transistor and the second transistor per channel width of 1 μm is 1 aA or less.
10. The semiconductor device according to claim 9 , wherein the oxide semiconductor layer includes a non-single-crystal region.
11. The semiconductor device according to claim 9 , wherein the oxide semiconductor layer includes a non-single-crystal region, the non-single crystal region has a c-axis alignment in a direction perpendicular to a surface of the oxide semiconductor layer.
12. An electronic device comprising:
the semiconductor device according to claim 9 ; and
an operation switch.
13. A semiconductor device comprising:
a first transistor;
a second transistor;
a third transistor; and
a fourth transistor,
wherein a first terminal of the first transistor is electrically connected to a first wiring and a second terminal of the first transistor is electrically connected to a second wiring,
wherein a gate of the second transistor is electrically connected to the first wiring, a first terminal of the second transistor is electrically connected to the first wiring, and a second terminal of the second transistor is electrically connected to a gate of the first transistor,
wherein a gate of the third transistor is electrically connected to a third wiring, a first terminal of the third transistor is electrically connected to a fourth wiring, and a second terminal of the third transistor is electrically connected to the second wiring,
wherein a gate of the fourth transistor is electrically connected to the third wiring, a first terminal of the fourth transistor is electrically connected to the fourth wiring, and a second terminal of the fourth transistor is electrically connected to the gate of the first transistor,
wherein each of the first to fourth transistors comprises an oxide semiconductor layer comprising a channel region, and
wherein an off-state current of each of the first to fourth transistors per channel width of 1 μm is 1 aA or less.
14. The semiconductor device according to claim 13 , wherein the oxide semiconductor layer includes a non-single-crystal region.
15. The semiconductor device according to claim 13 , wherein the oxide semiconductor layer includes a non-single-crystal region, the non-single crystal region has a c-axis alignment in a direction perpendicular to a surface of the oxide semiconductor layer.
16. An electronic device comprising:
the semiconductor device according to claim 13 ; and
an operation switch.
17. A semiconductor device comprising:
a first transistor;
a second transistor;
N third transistors, where N is a natural number; and
N fourth transistors,
wherein a first terminal of the first transistor is electrically connected to a first wiring and a second terminal of the first transistor is electrically connected to a second wiring,
wherein a gate of the second transistor is electrically connected to the first wiring, a first terminal of the second transistor is electrically connected to the first wiring, and a second terminal of the second transistor is electrically connected to a gate of the first transistor,
wherein each gate of the N third transistors and each gate of the N fourth transistors are electrically connected to one of an N third wiring, respectively,
wherein first terminals of the N third transistors are electrically connected to a fourth wiring, and second terminals of the N third transistors are electrically connected to the second wiring,
wherein first terminals of the N fourth transistors are electrically connected to the fourth wiring, and second terminals of the N fourth transistors are electrically connected to the gate of the first transistor,
wherein each of the first transistor, the second transistor, the N third transistors, and the N fourth transistors comprises an oxide semiconductor layer comprising a channel region, and
wherein an off-state current of each of the first transistor, the second transistor, the N third transistors, and the N fourth transistors per channel width of 1 μm is 1 aA or less.
18. The semiconductor device according to claim 17 , wherein the oxide semiconductor layer includes a non-single-crystal region.
19. The semiconductor device according to claim 17 , wherein the oxide semiconductor layer includes a non-single-crystal region, the non-single crystal region has a c-axis alignment in a direction perpendicular to a surface of the oxide semiconductor layer.
20. An electronic device comprising:
the semiconductor device according to claim 17 ; and
an operation switch.