IP Library Granted Patent US 8,541,819
Granted Patent B1
US 8,541,819 · App. 12/963,659 · Granted Sep 24, 2013

Semiconductor device and structure

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Quick Facts
Patent No.
US 8,541,819
App. No.
12/963,659
Granted
Sep 24, 2013
Kind
B1
Abstract

A semiconductor device including: a first mono-crystal layer and a second mono-crystal layer and at least one conductive layer in-between; where the at least one conductive layer includes a first conductive layer overlaying a second conductive layer overlying a third conductive layer, and where the second conductive layer having a predetermined second layer current carrying capacity greater than the current carrying capacity of the first conductive layer, and the second conductive layer current carrying capacity being greater than the current carrying capacity of the third conductive layer.

Claims (35)

1. A semiconductor device comprising:

a first mono-crystal layer and a second mono-crystal layer and at least one conductive layer in-between; wherein

said at least one conductive layer comprises a first conductive layer overlaying a second conductive layer overlying a third conductive layer, and wherein

said second conductive layer having a

predetermined second layer current carrying capacity greater than the current carrying capacity of said first conductive layer, and said second conductive layer current carrying capacity being greater than the current carrying capacity of said third conductive layer.

2. A device according to claim 1 wherein said at least one conductive layer comprises metal.

3. A device according to claim 1 wherein said at least one conductive layer comprises copper or aluminum.

4. A device according to claim 1 wherein said predetermined second layer current carrying capacity comprises higher layer thickness.

5. A device according to claim 1 wherein said predetermined second layer current carrying capacity comprises larger metal line width.

6. A device according to claim 1 wherein said mono-crystal comprises silicon.

7. A device according to claim 1 wherein said first mono-crystal and said second mono-crystal comprise two different crystalline materials.

8. A semiconductor device comprising:

a first mono-crystal layer and a second mono-crystal layer and at least one conductive layer in-between; wherein

said at least one conductive layer comprises a first conductive layer overlaying a second conductive layer overlying a third conductive layer; and wherein

said second conductive layer has a greater layer thickness than said first conductive layer, and said second conductive layer has a greater layer thickness than said third conductive layer.

9. A device according to claim 8 wherein said at least one conductive layer comprises metal.

10. A device according to claim 8 wherein said at least one conductive layer comprises copper or aluminum.

11. A device according to claim 8 wherein said greater layer thickness comprises larger metal line width.

12. A device according to claim 8 wherein said greater layer thickness comprises higher current carrying capability.

13. A device according to claim 8 wherein said mono-crystal comprises silicon.

14. A device according to claim 8 wherein said first mono-crystal and said second mono-crystal comprise two different crystalline materials.

15. A semiconductor device comprising:

a first mono-crystal layer and a second mono-crystal layer and at least one conductive layer in-between; wherein

said at least one conductive layer comprises a first conductive layer overlaying a second conductive layer overlying a third conductive layer, and wherein

said second conductive layer having a predetermined second layer current carrying capacity greater than the current carrying capacity of said first conductive layer, and said second conductive layer current carrying capacity being greater than the current carrying capacity of said third conductive layer,

and wherein

said first mono-crystal layer comprises first transistors, and said second mono-crystal layer comprises second transistors, and wherein

said second transistors are aligned to said first transistors.

16. A semiconductor device according to claim 15 wherein said first mono-crystal and said second mono-crystal comprise two different crystalline materials.

17. A semiconductor device according to claim 15 wherein said first mono-crystal comprises silicon.

18. A semiconductor device according to claim 15 wherein

said first mono-crystal comprises silicon in first orientation, and wherein

said second mono-crystal comprises silicon with a different orientation than said first orientation.

19. A device according to claim 15 wherein said at least one conductive layer comprises copper or aluminum.

20. A device according to claim 15 wherein said predetermined second layer current carrying capacity comprises a higher layer thickness.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2026
From: MONOLITHLC 3D™ INC.
To: SAMSUNG ELECTRONICS CO. , LTD.
Reel/Frame 073397/0890 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2022
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 058625/0664 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2020
From: MONOLITHIC 3D INC.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 054576/0686 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2013
From: OR-BACH, ZVI
To: MONOLITHIC 3D INC.
Reel/Frame 029682/0839 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2011
From: CRONQUIST, BRIAN; BEINGLASS, ISRAEL; DEJONG, JAN LODEWIJK; SEKAR, DEEPAK C.; WURMAN, ZE'EV; LIM, PAUL
To: MONOLITHIC 3D INC.
Reel/Frame 026024/0842 →