Non-volatile storage element having dual work-function electrodes

1. A non-volatile storage element comprising:

a first electrode including a first material having a first work function;

a second electrode including a second material having a second work function higher than the first work function;

a first dielectric disposed between the first electrode and the second electrode, the first dielectric having a first bandgap;

a second dielectric disposed between the first dielectric and the second electrode, the second dielectric having a second bandgap wider than the first bandgap and being disposed such that a quantum well is created in the first dielectric; and

a third dielectric disposed between the first electrode and the first dielectric, the third dielectric being thinner than the second dielectric and having a third bandgap wider than the first bandgap;

wherein the first electrode, second electrode, first dielectric and second dielectric are configured such that, at zero bias between the first electrode and the second electrode, a tilt results in conduction bands for each of the first dielectric, the second dielectric, and the third dielectric in a direction downwards toward the second electrode, and a storing of electrons takes place in the quantum well.

2. The storage element of claim 1 , wherein the first dielectric and the third dielectric include one of silicon dioxide, silicon nitride and silicon oxynitride.

3. The storage element of claim 1 , wherein at least one of the first dielectric and the second dielectric includes a high-k material.

4. The storage element of claim 1 , wherein the first dielectric is between about 1 nm and about 15 nm, the second dielectric is between about 0.5 nm and about 10 nm, and the third dielectric is between about 0.5 nm and 2 nm.

5. The storage element of claim 1 , wherein the first electrode, second electrode, first dielectric, second dielectric and third dielectric are configured such that, at a negative bias between the first electrode and the second electrode, a tilt results in conduction bands of the first dielectric, second dielectric and third dielectric in a direction downwards toward the second electrode, and a tunneling of electrons takes place into the quantum well from the first electrode.

6. The storage element of claim 1 , wherein the first electrode, second electrode, first dielectric, second dielectric and third dielectric are configured such that, at a positive bias between the first electrode and the second electrode, a tilt results in conduction bands of the first dielectric, second dielectric and third dielectric in a direction downwards toward the first electrode, and a tunneling of electrons takes place from the quantum well to the first electrode.

7. A method of making a storage element comprising:

providing a first electrode including a first material having a first work function;

providing a second electrode including a second material having a second work function higher than the first work function;

providing a first dielectric between the first electrode and the second electrode, the first dielectric having a first bandgap;

providing a second dielectric between the first dielectric and the second electrode, the second dielectric having a second bandgap wider than the first bandgap and being disposed such that a quantum well is created in the first dielectric;

providing a third dielectric between the first electrode and the first dielectric, the third dielectric being thinner than the second dielectric and having a third bandgap wider than the first bandgap; and

configuring the first electrode, second electrode, first dielectric, second dielectric and third dielectric such that, at zero bias between the first electrode and the second electrode, a tilt results in conduction bands of the first dielectric, the second dielectric, and the third dielectric in a direction downwards toward the second electrode, and a storing of electrons takes place in the quantum well.

8. The method of claim 7 , wherein the first dielectric and the third dielectric include one of silicon dioxide, silicon nitride and silicon oxynitride.

9. The method of claim 7 , wherein at least one of the first dielectric and the second dielectric includes a high-k material.

10. The method of claim 7 , wherein the first dielectric is between about 1 nm and about 15 nm, the second dielectric is between about 0.5 nm and about 10 nm, and the third dielectric is between about 0.5 nm and 2 nm.

11. The method of claim 7 , further comprising configuring the first electrode, second electrode, first dielectric, second dielectric and third dielectric such that, at a negative bias between the first electrode and the second electrode, a tilt results in conduction bands of the first dielectric, second dielectric and third dielectric in a direction downwards toward the second electrode, and a tunneling of electrons takes place into the quantum well from the first electrode.

12. The method of claim 7 , further comprising configuring the first electrode, second electrode, first dielectric, second dielectric and third dielectric such that, at a positive bias between the first electrode and the second electrode, a tilt results in conduction bands of the first dielectric, second dielectric and third dielectric in a direction downwards toward the first electrode, and a tunneling of electrons takes place from the quantum well to the first electrode.

13. An integrated circuit including:

a storage element comprising:

a first electrode including a first material having a first work function;

a second electrode including a second material having a second work function higher than the first work function;

a first dielectric disposed between the first electrode and the second electrode, the first dielectric having a first bandgap;

a second dielectric disposed between the first dielectric and the second electrode, the second dielectric having a second bandgap wider than the first bandgap and being disposed such that a quantum well is created in the first dielectric; and

a third dielectric disposed between the first electrode and the first dielectric, the third dielectric being thinner than the second dielectric and having a third bandgap wider than the first bandgap; and

a stack including interconnect layers, interlayer dielectric layers interleaved with the interconnect layers, and vias extending into the interlayer dielectric layers, the stack comprising a first via of the vias connected to the first electrode, and a second via of the vias connected to the second electrode;

wherein the first electrode, second electrode, first dielectric and second dielectric are configured such that, at zero bias between the first electrode and the second electrode, a tilt results in conduction bands for each of the first dielectric, the second dielectric, and the third dielectric in a direction downwards toward the second electrode, and a storing of electrons takes place in the quantum well.

14. The integrated circuit of claim 13 , wherein the first dielectric and the third dielectric include one of silicon dioxide, silicon nitride and silicon oxynitride.

15. The integrated circuit of claim 13 , wherein at least one of the first dielectric and the second dielectric includes a high-k material.