IP Library Granted Patent US 8,664,036
Granted Patent B2
US 8,664,036 · App. 12/968,331 · Granted Mar 4, 2014

Semiconductor device and manufacturing method thereof

Inventors: Shunpei Yamazaki (Tokyo, JP); Hotaka Maruyama (Tochigi, JP); Yoshiaki Oikawa (Kanagawa, JP); Katsuaki Tochibayashi (Tochigi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,664,036
App. No.
12/968,331
Granted
Mar 4, 2014
Kind
B2
Abstract

An oxide semiconductor layer with excellent crystallinity is formed to enable manufacture of transistors with excellent electrical characteristics for practical application of a large display device, a high-performance semiconductor device, etc. By first heat treatment, a first oxide semiconductor layer is crystallized. A second oxide semiconductor layer is formed over the first oxide semiconductor layer. By second heat treatment, an oxide semiconductor layer including a crystal region having the c-axis oriented substantially perpendicular to a surface is efficiently formed and oxygen vacancies are efficiently filled. An oxide insulating layer is formed over and in contact with the oxide semiconductor layer. By third heat treatment, oxygen is supplied again to the oxide semiconductor layer. A nitride insulating layer containing hydrogen is formed over the oxide insulating layer. By fourth heat treatment, hydrogen is supplied at least to an interface between the second oxide semiconductor layer and the oxide insulating layer.

Claims (71)

1. A method for manufacturing a semiconductor device, comprising:

forming a first oxide semiconductor layer;

performing first heat treatment on the first oxide semiconductor layer to form a crystal region which is grown from a surface toward an inside of the first oxide semiconductor layer, wherein the crystal region includes crystals whose c-axis is oriented in a direction substantially perpendicular to the surface of the first oxide semiconductor layer;

forming a second oxide semiconductor layer over the first oxide semiconductor layer including the crystal region;

performing second heat treatment on the first oxide semiconductor layer and the second oxide semiconductor layer in an atmosphere including oxygen at a constant temperature so as to form c-axis oriented crystals grown from the crystal region in the second oxide semiconductor layer and so as to supply oxygen to the first oxide semiconductor layer and the second oxide semiconductor layer;

forming a conductive layer over the second oxide semiconductor layer on which the second heat treatment is performed;

forming a source electrode layer and a drain electrode layer by selectively etching the conductive layer;

forming an oxide insulating layer to cover the source electrode layer, the drain electrode layer, and the second oxide semiconductor layer, wherein the oxide insulating layer is in contact with the second oxide semiconductor layer;

performing third heat treatment on the oxide insulating layer to supply oxygen to the second oxide semiconductor layer;

forming a gate electrode layer over the oxide insulating layer, the gate electrode layer overlapping with the second oxide semiconductor layer to which oxygen is supplied;

forming a nitride insulating layer including hydrogen over the gate electrode layer and the oxide insulating layer; and

performing fourth heat treatment on the nitride insulating layer to terminate dangling bonds with hydrogen, the dangling bonds existing at least in the first oxide semiconductor layer and the second oxide semiconductor layer and at an interface between the second oxide semiconductor layer and the oxide insulating layer, wherein an oxygen concentration of the atmosphere is increased over heat treatment time in the second heat treatment.

2. The method for manufacturing a semiconductor device according to claim 1 ,

wherein the first heat treatment is performed at a temperature greater than or equal to 400° C. and less than or equal to 800° C. in an atmosphere selected from nitrogen, a rare gas, oxygen, a mixed gas of oxygen and one of nitrogen and a rare gas, and dry air.

3. The method for manufacturing a semiconductor device according to claim 1 ,

wherein the second heat treatment is performed at a temperature greater than or equal to 400° C. and less than or equal to 800° C. and in an atmosphere selected from nitrogen, a rare gas, oxygen, a mixed gas of oxygen and one of nitrogen and a rare gas, and dry air.

4. The method for manufacturing a semiconductor device according to claim 1 , wherein the second heat treatment is finished in an atmosphere including oxygen.

5. The method for manufacturing a semiconductor device according to claim 1 , wherein the third heat treatment is performed at a temperature greater than or equal to 200° C. and less than or equal to 450° C.

6. The method for manufacturing a semiconductor device according to claim 1 , wherein the fourth heat treatment is performed at a temperature greater than or equal to 150° C. and less than or equal to 450° C.

7. A method for manufacturing a semiconductor device, comprising:

forming a gate electrode layer;

forming a first oxide insulating layer over the gate electrode layer;

forming a first oxide semiconductor layer over the gate electrode layer and the first oxide insulating layer;

performing first heat treatment on the first oxide semiconductor layer to form a crystal region which is grown from a surface toward an inside of the first oxide semiconductor layer, wherein the crystal region includes crystals whose c-axis is oriented in a direction substantially perpendicular to the surface of the first oxide semiconductor layer;

forming a second oxide semiconductor layer over the first oxide semiconductor layer including the crystal region;

performing second heat treatment on the first oxide semiconductor layer and the second oxide semiconductor layer in an atmosphere including oxygen at a constant temperature so as to form c-axis oriented crystals grown from the crystal region in the second oxide semiconductor layer and so as to supply oxygen to the first oxide semiconductor layer and the second oxide semiconductor layer;

forming a conductive layer over the second oxide semiconductor layer on which the second heat treatment is performed;

forming a source electrode layer and a drain electrode layer by selectively etching the conductive layer;

forming a second oxide insulating layer to cover the source electrode layer, the drain electrode layer, and the second oxide semiconductor layer, wherein the second oxide insulating layer is in contact with the second oxide semiconductor layer;

performing third heat treatment on the second oxide insulating layer to supply oxygen to the second oxide semiconductor layer;

forming a nitride insulating layer including hydrogen over the second oxide insulating layer on which the third heat treatment is performed; and

performing fourth heat treatment on the nitride insulating layer to terminate dangling bonds with hydrogen, the dangling bonds existing at least in the first oxide semiconductor layer and the second oxide semiconductor layer and at interfaces between the first oxide insulating layer and the first oxide semiconductor layer and between the second oxide insulating layer and the second oxide semiconductor layer, wherein an oxygen concentration of the atmosphere is increased over heat treatment time in the second heat treatment.

8. The method for manufacturing a semiconductor device according to claim 7 ,

wherein the first heat treatment is performed at a temperature greater than or equal to 400° C. and less than or equal to 800° C. in an atmosphere selected from nitrogen, a rare gas, oxygen, a mixed gas of oxygen and one of nitrogen and a rare gas, and dry air.

9. The method for manufacturing a semiconductor device according to claim 7 ,

wherein the second heat treatment is performed at a temperature greater than or equal to 400° C. and less than or equal to 800° C. and in an atmosphere selected from nitrogen, a rare gas, oxygen, a mixed gas of oxygen and one of nitrogen and a rare gas, and dry air.

10. The method for manufacturing a semiconductor device according to claim 7 , wherein the second heat treatment is finished in an atmosphere including oxygen.

11. The method for manufacturing a semiconductor device according to claim 7 , wherein the third heat treatment is performed at a temperature greater than or equal to 200° C. and less than or equal to 450° C.

12. The method for manufacturing a semiconductor device according to claim 7 , wherein the fourth heat treatment is performed at a temperature greater than or equal to 150° C. and less than or equal to 450° C.

13. A method for manufacturing a semiconductor device, comprising:

forming a first oxide semiconductor layer;

performing first heat treatment to form a crystal region which is grown from a surface of the first oxide semiconductor layer in the first oxide semiconductor layer;

forming a second oxide semiconductor layer over the first oxide semiconductor layer including the crystal region;

performing second heat treatment in an atmosphere including oxygen to form crystals grown form the crystal region in the second oxide semiconductor layer;

after performing the second heat treatment, forming an interlayer insulating layer including hydrogen over the second oxide semiconductor layer; and

performing third heat treatment on the interlayer insulating layer, wherein an oxygen concentration of the atmosphere is increased over heat treatment time in the second heat treatment.

14. The method for manufacturing a semiconductor device according to claim 13 , further comprising:

forming a gate electrode layer; and

forming an oxide insulating layer over the gate electrode layer,

wherein the first oxide semiconductor layer is formed over the oxide insulating layer.

15. The method for manufacturing a semiconductor device according to claim 13 , further comprising:

forming an oxide insulating layer over the second oxide semiconductor layer; and

forming a gate electrode layer over the oxide insulating layer,

wherein the interlayer insulating layer is provided over the gate electrode layer.

16. The method for manufacturing a semiconductor device according to claim 13 ,

wherein the second oxide semiconductor layer is formed by sputtering method using a target having a composition ratio of In:Ga:Zn=1:x:y, and

wherein x is greater than or equal to 0 and less than or equal to 2, and y is greater than or equal to 1 and less than or equal to 5.

17. The method for manufacturing a semiconductor device according to claim 16 ,

wherein x is 1 and y is 1.

18. The method for manufacturing a semiconductor device according to claim 13 ,

wherein a carrier concentration of the second oxide semiconductor layer is less than 1×10 12 cm −3 .

19. The method for manufacturing a semiconductor device according to claim 13 ,

wherein the second heat treatment is performed at a temperature greater than or equal to 400° C. and less than or equal to 800° C.

20. The method for manufacturing a semiconductor device according to claim 13 ,

wherein the first oxide semiconductor layer includes In—Zn—O, and

wherein the second oxide semiconductor layer includes In—Ga—Zn—O.

21. The method for manufacturing a semiconductor device according to claim 13 , further comprising:

forming a gate electrode layer; and

forming a source electrode layer and a drain electrode layer over the second oxide semiconductor layer,

wherein the gate electrode layer overlaps with the source electrode layer and the drain electrode layer.

22. The method for manufacturing a semiconductor device according to claim 13 , wherein the third heat treatment is performed so as to terminate dangling bonds with hydrogen, the dangling bonds existing at least in the first oxide semiconductor layer and the second oxide semiconductor layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 26, 2011
From: YAMAZAKI, SHUNPEI; MARUYAMA, HOTAKA; OIKAWA, YOSHIAKI; TOCHIBAYASHI, KATSUAKI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 025699/0708 →
Priority Claims (1)
JP 2009-288245 · Dec 18, 2009 · national
Continuity (1)
Related Publication 20110151618A1 · Jun 23, 2011