Combined balun and impedance matching circuit
View Patent ↗An apparatus for providing impedance matching between a single-ended circuit and a differential circuit includes first and second capacitors and first and second inductors. The first capacitor is connected between an input/output of the single-ended circuit and a first differential input/output of the differential circuit. The first inductor is connected between the input/output of the single-ended circuit and a second differential input/output of the differential circuit. The second capacitor is connected between the second differential input/output of the differential circuit and ground. The second inductor is connected between the first differential input/output of the differential circuit and the second differential input/output of the differential circuit.
1. An apparatus for providing impedance matching between a single-ended circuit and a differential circuit, the apparatus comprising:
a first capacitor directly connected between an input/output of the single-ended circuit and a first differential input/output of the differential circuit;
a first inductor directly connected between the input/output of the single-ended circuit and a second differential input/output of the differential circuit;
a second capacitor connected between the second differential input/output of the differential circuit and ground; and
a second inductor connected between the first differential input/output of the differential circuit and the second differential input/output of the differential circuit.
2. The apparatus of claim 1 , further comprising:
a first trace on a printed circuit board connecting the input/output of the single-ended circuit to the first capacitor; and
a second trace on the printed circuit board connecting the first capacitor to the first differential input/output of the differential circuit, the second trace being substantially shorter than the first trace to enhance impedance matching with the differential circuit.
3. The apparatus of claim 1 , wherein the first and second capacitors and the first and second inductors are surface mounted technology (SMT) components mounted on a printed circuit board.
4. The apparatus of claim 3 , wherein the single-ended circuit comprises a duplexer mounted to the printed circuit board, the duplexer including a film bulk acoustic resonator (FBAR) filter providing the input/output of the single-ended circuit.
5. The apparatus of claim 4 , wherein the differential circuit comprises a transceiver mounted to the printed circuit board, the transceiver including a first low noise amplifier connected to the first differential input/output of the differential circuit and a second low noise amplifier connected to the second differential input/output of the differential circuit.
6. An apparatus for providing impedance matching between a duplexer circuit and a transceiver circuit mounted on a printed circuit board, the apparatus comprising:
an impedance matching circuit comprising a first capacitor connected between a single-ended input/output of the duplexer circuit and a first differential input/output of the transceiver, a first inductor connected between the single-ended input/output of the duplexer filter and a first node, an LC component connected between the first node a second differential input/output of the transceiver, and a second inductor connected between the first differential input/output and the second differential input/output of the transceiver; and
a balun circuit comprising the first capacitor, the first inductor, and a second capacitor connected between the first node and ground, the balun circuit being configured to convert between unbalanced signals at the single-ended input/output of the duplexer circuit and balanced signals at the first and second differential inputs/outputs of the differential transceiver circuit.
7. The apparatus of claim 6 , wherein the duplexer circuit comprises a film bulk acoustic resonator (FBAR) filter connected between the single-ended input/output of the duplexer circuit and an antenna.
8. The apparatus of claim 7 , wherein the transceiver circuit comprises a first low noise amplifier connected to the first differential input/output of the transceiver circuit, and a second low noise amplifier connected to the second differential input/output of the transceiver circuit.
9. The apparatus of claim 8 , wherein the first capacitor, the first inductor, the LC component and the second inductor are surface mounted technology (SMT) components mounted to the printed circuit board circuit and connecting the duplexer circuit and the transceiver circuit.
10. The apparatus of claim 9 , wherein the second capacitor is SMT component mounted to the printed circuit board separate from a duplexer chip containing the duplexer circuit.
11. The apparatus of claim 9 , wherein the second capacitor is formed between a plurality of conductive layers of the printed circuit board.
12. The apparatus of claim 9 , wherein the second capacitor is formed on a duplexer chip containing the duplexer circuit.
13. The apparatus of claim 12 , wherein the duplexer chip fits in an area of the printed circuit board configured to accommodate a duplexer chip including a surface acoustic wave (SAW) filter having a differential input/output.
14. The apparatus of claim 13 , wherein the impedance matching circuit is the same as an impedance matching circuit for the SAW filter.
15. The apparatus of claim 6 , wherein the LC component comprises a third capacitor, for enhancing DC blocking for the transceiver circuit.
16. The apparatus of claim 6 , wherein the LC component comprises a third inductor, for enhancing insertion loss characteristics of the transceiver circuit.
17. An apparatus for converting between an unbalanced signal of a receive portion of a duplexer on a first chip mounted on a printed circuit board and a balanced signal of a receiver portion of a transceiver on a second chip mounted to the printed circuit board, the receive portion of the duplexer comprising a film bulk acoustic resonator (FBAR) filter and the receiver portion of the transceiver comprising first and second low noise amplifiers (LNAs), the apparatus comprising:
a balun circuit comprising a first capacitor connected between a single-ended output of the FBAR filter and a first differential input of the first LNA, a first inductor connected between the single-ended output of the FBAR filter and a first node, and a second capacitor connected between the first node and ground; and
an impedance matching circuit comprising the first capacitor, the first inductor, an LC component connected between the first node and a second differential input of the second LNA, and a second inductor connected between the first differential input of the first LNA and the second differential input of the second LNA,
wherein the second capacitor is located on the first chip, and wherein the first capacitor, the first inductor, the second inductor and the LC component are mounted on the printed circuit board to connect the first chip and the second chip.
18. The device of claim 17 , wherein the LC component comprises a third capacitor, for enhancing DC blocking for the transceiver.
19. The device of claim 17 , wherein the LC component comprises a third inductor, for enhancing insertion loss characteristics of the transceiver.
20. The device of claim 17 , wherein the first chip fits in an area of the printed circuit board configured for a duplexer chip including a surface acoustic wave (SAW) filter having a differential input/output, and
wherein the impedance matching circuit is the same as an impedance matching circuit for the SAW filter.