IP Library Granted Patent US 8,952,538
Granted Patent B2
US 8,952,538 · App. 12/975,961 · Granted Feb 10, 2015

Semiconductor device and method for manufacturing the same

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Quick Facts
Patent No.
US 8,952,538
App. No.
12/975,961
Granted
Feb 10, 2015
Kind
B2
Abstract

A semiconductor device includes: an integrated circuit having an electrode pad; a first insulating layer disposed on the integrated circuit; a redistribution layer including a plurality of wirings and disposed on the first insulating layer, at least one of the plurality of wirings being electrically coupled to the electrode pad; a second insulating layer having a opening on at least a portion of the plurality of wirings; a metal film disposed on the opening and on the second insulating layer, and electrically coupled to at least one of the plurality of wirings; and a solder bump the solder bump overhanging at least one of the plurality of wirings not electrically coupled to the metal film.

Claims (28)

1. A semiconductor device comprising:

a semiconductor substrate;

an electrode pad disposed on the semiconductor substrate;

a first insulating layer disposed on the electrode pad and the semiconductor substrate; the first insulating layer having a first opening directly over the electrode pad;

first wiring disposed on the first insulating layer, the first wiring being directly coupled to the electrode pad through a conductor via formed in the first opening;

a second wiring disposed on the first insulating layer, the second wiring is disposed perpendicularly to the first wiring;

a second insulating layer disposed on the first wiring, the second wiring and the first insulating layer, the second insulating layer having a second opening overlying a portion of the first wiring;

a metal film disposed on the first wiring in the second opening and on a part of the second insulating layer; and

a solder bump overlying the metal film,

wherein the second wire passes through under the metal film.

2. The semiconductor device according to claim 1 ,

wherein the second wiring has a center line average surface roughness of 100 nm or more in at least a portion contacting the second insulating layer.

3. The semiconductor device according to claim 1 , wherein the metal film includes a Ni layer.

4. The semiconductor device according to claim 1 , wherein the metal film includes a Cu layer having a thickness of 1 μm or more and a Ni layer.

5. A semiconductor device comprising:

a semiconductor substrate;

an electrode pad disposed on the semiconductor substrate;

a first insulating layer disposed on the electrode pad and the semiconductor substrate, the first insulating layer having a first opening directly over the electrode pad;

a first wiring disposed on the first insulating layer, the first wiring being directly coupled to the electrode pad through a conductor via formed in the first opening;

a second wiring disposed on the first insulating layer, the second wiring is disposed perpendicularly to the first wiring;

a second insulating layer disposed on the first wiring, the second wiring and the first insulating layer, the second insulating layer having a second opening overlying portion of the first wiring; and

a metal layer disposed on the first wiring in the second opening and on a part of the second insulating layer,

wherein the metal layer overhangs the second wiring.

6. The semiconductor device according to claim 5 ,

wherein the second wiring has a center line average surface roughness of 100 nm or more in at least a portion contacting the second insulating layer.

7. The semiconductor device according to claim 5 , wherein the second insulating layer includes a phenol resin.

8. The semiconductor device according to claim 7 , wherein the second insulating layer includes a rubber material.

9. The semiconductor device according to claim 5 , wherein the second insulating layer on the plurality of wirings has a thickness of 3 μm or more.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035453/0904 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 23, 2010
From: MATSUKI, HIROHISA
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 025562/0710 →