Surface inspection tool and surface inspection method
View Patent ↗An object of the present invention is to provide a surface inspection tool in which a flat inspection range capable of measuring surface roughness of a wafer with patterns with high accuracy and in a nondestructive manner can be searched without visual search. In order to solve the object, in a surface inspection tool 110 which measures scattering light intensity of scattering light generated by irradiated irradiation light in association with a measurement coordinate on a wafer 200 with patterns and inspects the surface roughness of the wafer 200 , the surface inspection tool includes a controller 250 which extracts measurement coordinate of the measured scattering light intensity that is equal to or more than a lower limit threshold L, sets an inspection range 406 of the surface roughness inspection in a partial layout 405 a of a part of the whole layout 401 of the pattern corresponding to the periphery of the extracted measurement coordinate, and obtains the surface roughness in the inspection range 406.
1. A system for acquiring a surface condition of a substrate, the system comprising:
a processing unit configured to:
relate circuit-pattern-data of the substrate to distribution of an optical property of the substrate, and
acquire a surface roughness of the substrate by the relation of the circuit pattern-data to the distribution of the optical property; and
a display unit which displays the distribution of the optical property.
2. The system according to claim 1 , wherein the distribution of the optical property is an intensity-distribution of a light from the substrate.
3. The system according to claim 1 ,
wherein the display unit displays the distribution of the optical property by a contour map.
4. A system according to claim 1 , wherein the display unit displays a chip-layout on the substrate, so that a chip to be detected in the distribution of the optical property and a chip to be detected in the chip-layout are displayed in the same size, respectively.
5. A system according to claim 1 , wherein the processing unit acquires detection-frequency of the distribution of the optical property.
6. A system according to claim 5 , wherein the processing unit is further configured to:
execute threshold-processing against the distribution of the optical property by using at least one of first and second threshold values, wherein:
the first threshold value is larger than a signal from a memory area of the chip and smaller than a signal from a logic area of the chip, and
the second threshold value is larger than the signal from the logic area of the chip.
7. A method for acquiring a surface condition of a substrate, the method comprising steps of:
by way of processing unit:
relating a circuit-pattern-data of the substrate to distribution of an optical property of the substrate; and
acquiring a surface roughness of the substrate by using the relation of the circuit pattern-data to the distribution of the optical property; and displaying the distribution of the optical property on a display unit.
8. The method according to claim 7 , wherein the distribution of the optical property is an intensity-distribution of a light from the substrate.
9. The system according to claim 7 , wherein the displaying step includes displaying the distribution of the optical property by a contour map.
10. The method according to claim 7 , wherein the displaying step includes displaying a chip-layout on the substrate, so that a chip to be detected in the distribution of the optical property and a chip to be detected in the chip-layout are displayed in the same size, respectively.
11. The method according to claim 7 , further comprising the step of acquiring a detection-frequency of the distribution of the optical property.
12. The method according to claim 11 , further comprising the steps of:
executing threshold-processing against the distribution of the optical property by using at least one of first and second threshold values, wherein:
the first threshold value is larger than a signal from a memory area of the chip and smaller than signal from a logic area of the chip, and
the second threshold value is larger than the signal from the logic area of the chip.