IP Library Granted Patent US 7,977,208
Granted Patent B2
US 7,977,208 · App. 12/982,346 · Granted Jul 12, 2011

Method and apparatus for packaging circuit devices

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Quick Facts
Patent No.
US 7,977,208
App. No.
12/982,346
Granted
Jul 12, 2011
Kind
B2
Abstract

A hermetically sealed package includes a lid ( 14 ) hermetically bonded to a wafer or substrate ( 12 ), with a chamber therebetween defined by a recess ( 16 ) in the lid. A circuit device ( 26 ) such as MEMS device is provided within the chamber on the substrate. A plurality of vias ( 41 - 46 ) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.

Claims (43)

1. A method comprising:

providing a wafer comprising a first side and a second side;

forming an opening through the wafer, the opening extending from the first side to the second side;

oxidizing the wafer;

forming a via in the opening, the forming comprising:

sputtering a first metal material onto the first and second sides and into the opening so as to completely cover surfaces within the opening;

sputtering a second metal material onto the first and second sides into the opening so as to completely cover the first metal material within the opening;

forming a glass material within the opening after the sputtering of the second metal material, the glass material forming a hermetic seal between the first and second sides of the wafer;

forming a first annular flange around the opening on the first side of the wafer, and a second annular flange around the opening on the second side of the wafer, the annular flanges comprising the first and second metal materials;

forming a micro-electro-mechanical system (MEMS) on the first side of the wafer;

forming a lid by creating a recess in a sheet of glass material; and

anodically bonding the lid to the first side of the wafer in order to form a hermetic seal between the lid and wafer, the lid being aligned so that the MEMS and the via is disposed within the recess of the lid;

wherein the bonding the lid to the wafer occurs in an atmosphere of an inert gas so that the MEMS is hermetically sealed under the lid in the inert gas.

2. The method of claim 1 , wherein forming a glass material within the opening comprises:

applying a stencil to either the first side or the second side of the wafer;

aligning an opening in the stencil with the opening in the wafer;

screening a glass material through the opening in the stencil and into the opening in the wafer;

drying the glass material; and

firing the glass material.

3. The method of claim 1 , wherein:

the first metal material comprises titanium tungsten; and

the second metal material comprises gold.

4. The method of claim 1 , wherein forming the first annular flange and the second annular flange comprises etching each side of the wafer in order to remove portions of the first and second metal materials.

5. The method of claim 1 , further comprising forming an electrical trace on the first side of the wafer by remove portions of the first and second metal materials.

6. The method of claim 1 , further comprising forming a ground plane by removing portions of the first and second metal materials.

7. The method of claim 1 , wherein the opening through the wafer comprises a diameter of approximately 153 to 250 μm.

8. A method of forming a via comprising:

forming an opening through a wafer;

oxidizing the wafer;

sputtering a first metal material onto the first and second sides and into the opening so as to completely cover surfaces within the opening;

sputtering a second metal material onto the first and second sides into the opening so as to completely cover the first metal material within the opening;

forming a glass material within the opening after the sputtering of the second metal material, the glass material forming a hermetic seal between the first and second sides of the wafer; and

forming a first annular flange around the opening on the first side of the wafer, and a second annular flange around the opening on the second side of the wafer, the annular flanges comprising the first and second metal materials.

9. The method of claim 8 , wherein forming a glass material within the opening comprises:

applying a stencil to either side of the wafer;

aligning an opening in the stencil with the opening in the wafer;

screening a glass material through the opening in the stencil and into the opening in the wafer;

drying the glass material; and

firing the glass material.

10. The method of claim 8 , wherein:

the first metal material comprises titanium tungsten; and

the second metal material comprises gold.

11. The method of claim 8 , wherein forming the first annular flange and the second annular flange comprises etching either side of the wafer in order to remove portions of the first and second metal materials.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 20, 2012
From: RAYTHEON COMPANY
To: INVENSAS CORPORATION
Reel/Frame 029046/0885 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2010
From: ABLES, BILLY D.; EHMKE, JOHN C.; GOOCH, ROLAND W.
To: RAYTHEON COMPANY
Reel/Frame 025773/0766 →