IP Library Granted Patent US 8,575,766
Granted Patent B2
US 8,575,766 · App. 12/986,556 · Granted Nov 5, 2013

Microelectronic assembly with impedance controlled wirebond and conductive reference element

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Quick Facts
Patent No.
US 8,575,766
App. No.
12/986,556
Granted
Nov 5, 2013
Kind
B2
Abstract

A microelectronic assembly can include a microelectronic device having device contacts exposed at a surface thereof and an interconnection element having element contacts and having a face adjacent to the microelectronic device. Conductive elements, e.g., wirebonds connect the device contacts with the element contacts and have portions extending in runs above the surface of the microelectronic device. A conductive layer has a conductive surface disposed at least a substantially uniform distance above or below the plurality of the runs of the conductive elements. In some cases, the conductive material can have first and second dimensions in first and second horizontal directions which are smaller than first and second corresponding dimensions of the microelectronic device. The conductive material is connectable to a source of reference potential so as to achieve a desired impedance for the conductive elements.

Claims (22)

1. A microelectronic assembly comprising:

a semiconductor die having microelectronic circuitry thereon, the semiconductor die having a front surface and a rear surface remote therefrom, and one or more surface conductive elements each having a planar surface parallel to the front surface, and device contacts exposed at the front surface;

an interconnection element including a dielectric element underlying the rear surface of the semiconductor die, the interconnection element having a plurality of element contacts thereon;

a plurality of raised conductive elements connecting the device contacts with the element contacts, the raised conductive elements having substantial portions extending in runs spaced a first height above the front surface and above the one or more surface conductive elements and at least generally parallel to the one or more surface conductive elements such that the one or more surface conductive elements are between the semiconductor die and the raised conductive elements,

wherein the one or more surface conductive elements is connectable to a source of reference potential, such that a desired impedance is achieved for the raised conductive elements and

the one or more surface conductive elements is a conductive plane.

2. A microelectronic assembly comprising:

a semiconductor die having microelectronic circuitry thereon, the semiconductor die having a front surface and a rear surface remote therefrom, and one or more surface conductive elements each having a planar surface parallel to the front surface, and device contacts exposed at the front surface;

an interconnection element including a dielectric element underlying the rear surface of the semiconductor die, the interconnection element having a plurality of element contacts thereon;

a plurality of raised conductive elements connecting the device contacts with the element contacts, the raised conductive elements having substantial portions extending in runs spaced a first height above the front surface and above the one or more surface conductive elements and at least generally parallel to the one or more surface conductive elements such that the one or more surface conductive elements are between the semiconductor die and the raised conductive elements,

wherein the one or more surface conductive elements is connectable to a source of reference potential, such that a desired impedance is achieved for the raised conductive elements,

and the one or more surface conductive elements includes a metal layer bonded to the front surface of the semiconductor die.

3. A microelectronic assembly as claimed in claim 2 , wherein an adhesive bonds the one or more surface conductive elements to the front surface of the semiconductor die.

4. A microelectronic assembly as claimed in claim 2 , wherein the metal layer includes openings, wherein the raised conductive elements connect to the device contacts through the openings in the metal layer.

5. A microelectronic assembly as claimed in claim 2 , wherein the one or more surface conductive elements is a conductive plane of the bonded metal layer.

6. A microelectronic assembly as claimed in claim 2 , wherein the one or more surface conductive elements are a plurality of conductive strips of the bonded metal layer.

7. A microelectronic assembly comprising:

a semiconductor die having microelectronic circuitry thereon, the semiconductor die having a front surface and a rear surface remote therefrom, and one or more surface conductive elements each having a planar surface parallel to the front surface, and device contacts exposed at the front surface;

an interconnection element including a dielectric element underlying the rear surface of the semiconductor die, the interconnection element having a plurality of element contacts thereon;

a plurality of raised conductive elements connecting the device contacts with the element contacts, the raised conductive elements having substantial portions extending in runs spaced a first height above the front surface and above the one or more surface conductive elements and at least generally parallel to the one or more surface conductive elements such that the one or more surface conductive elements are between the semiconductor die and the raised conductive elements,

wherein the one or more surface conductive elements is connectable to a source of reference potential, such that a desired impedance is achieved for the raised conductive elements and

the one or more surface conductive elements comprises a plurality of conductive strips.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2011
From: TESSERA RESEARCH LLC
To: TESSERA, INC.
Reel/Frame 026916/0054 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2011
From: HABA, BELGACEM; MARCUCCI, BRIAN
To: TESSERA RESEARCH LLC
Reel/Frame 025613/0598 →