System and method for metastability verification of circuits of an integrated circuit
View Patent ↗A method and system for metastability verification of an integrated circuit design are provided. An IC design is received and the source-to-destination paths of the IC design are determined. For each of the determined source-to-destination paths, it is determined whether the corresponding source is synchronized. For each source its respective synchronized or unsynchronized result is stored and a report is generated for each source describing whether it is synchronized or unsynchronized.
1. A method for metastability verification of an integrated circuit design (IC), the method comprising:
receiving an IC design from a data storage of a computer aided design (CAD) system;
determining at least a source-to-destination path of the IC design;
determining by structural pruning potential synchronization points for each of the two or more sources of the sources-destination;
determining for the at least a source-to-destination path whether each of the corresponding source is synchronized respective of the potential synchronization points;
storing in the data storage for each source its respective synchronized or unsynchronized result; and
providing a report of each source determined to be synchronized and each source determined to be unsynchronized.
2. The method of claim 1 , wherein determining the source-to destination paths comprises:
identifying destinations by clock-domain analysis; and
grouping together destinations corresponding to the same clock-domain into respective same-domain groups.
3. The method of claim 2 , further comprising:
identifying each source corresponding to each of the destinations in the same-domain groups; and
identifying synchronizers in the same domain-group which are in transitive fan-in cones.
4. The method of claim 3 , wherein identifying synchronizers comprises using at least a graph algorithm of linear-time complexity.
5. The method of claim 1 , wherein the structural pruning comprises using a graph algorithm of linear-time complexity.
6. The method of claim 1 , wherein determining for each source-to-destination path whether the source is definitely synchronized or definitely unsynchronized comprises:
marking a source as unsynchronized if no synchronization points are found for the source.
7. The method of claim 1 , wherein determining for each source-to-destination path whether the source is definitely synchronized or definitely unsynchronized comprises:
marking a source as synchronized if the source passes a data hold and glitch check.
8. The method of claim 7 , wherein the data hold and glitch check are performed upon determination that a condition under which the source is blocked from the destination is met.
9. The method of claim 8 , wherein the condition under which the source is blocked from the destination is checked for each potential synchronization point identified.
10. A non-transitory computer readable medium having stored thereon instructions for causing one or more processing units to execute the method according to claim 1 .