Thin film transistor and method of manufacturing the same
Provided are a coplanar structure thin film transistor that allows a threshold voltage to change only a little under electric stress, and a method of manufacturing the same. The thin film transistor includes on a substrate at least: a gate electrode; a gate insulating layer; an oxide semiconductor layer including a source electrode, a drain electrode, and a channel region; a channel protection layer; and an interlayer insulating layer. The channel protection layer includes one or more layers, the layer in contact with the oxide semiconductor layer among the one or more layers being made of an insulating material containing oxygen, ends of the channel protection layer are thinner than a central part of the channel protection layer, the interlayer insulating layer contains hydrogen, and regions of the oxide semiconductor layer that are in direct contact with the interlayer insulating layer form the source electrode and the drain electrode.
1. A thin film transistor, comprising on a substrate at least:
a gate electrode;
a gate insulating layer on the gate electrode;
an oxide semiconductor layer on the gate insulating layer;
a channel protection layer on the oxide semiconductor layer; and
an insulating interlayer which contains hydrogen and has an intermediate region contacts with the channel protection layer and two outer regions, each of which contacts with the oxide semiconductor layer outside of the intermediate region, respectively,
wherein the oxide semiconductor layer contains an amorphous In—Ga—Zn—O as a major component,
wherein the channel protection layer has at least one layer containing a silicon oxide as a major component in contact with the oxide semiconductor layer,
wherein the channel protection layer has a central part and two thinner end parts, each of which is thinner than the central part so as to be a hydrogen transmittance path from the insulating interlayer to the oxide semiconductor layer, and both of which sandwich the central part,
and
wherein the oxide semiconductor layer has, in a coplanar arrangement, a channel region underneath the central part of the channel protection layer, a source electrode underneath one of the two outer regions, a drain electrode underneath the other of the two outer regions, and each of two medium-resistance regions underneath each of the two thinner end parts, respectively.
2. A thin film transistor according to claim 1 ,
wherein the channel protection layer is made of one layer, and
wherein each of the two thinner end parts is a forward tapered shape respectively.
3. A thin film transistor according to claim 2 , wherein a hydrogen concentration of one region of the oxide semiconductor layer underneath the central part of the channel protection layer is smaller than that of the other region of the oxide semiconductor layer underneath the each of the two thinner end parts.
4. A thin film transistor according to claim 1 ,
wherein the channel protection layer includes two layers formed of a first channel protection layer and a second channel protection layer, and
wherein the second channel protection layer is laminated on the first channel protection layer.
5. A thin film transistor according to claim 1 , wherein the gate electrode is formed below a region in which the channel protection layer and the oxide semiconductor layer overlap each other.
6. A thin film transistor according to claim 1 , wherein the insulating interlayer comprises any one of a silicon nitride film, a silicon oxide film, a silicon oxynitride film, a silicon carbide film, and a laminated film thereof.
7. A display device comprising:
the thin film transistor according to claim 1 ; and
a display element has at least one electrode electrically connected to either of the source electrode or the drain electrode of the thin film transistor.
8. A display device according to claim 7 , wherein the display element comprises an electro-luminescence device.
9. A display device according to claim 7 , wherein the display element comprises a liquid crystal cell.
10. A display device according to claim 7 , wherein a plurality of the display elements and a plurality of the thin film transistors are arranged two-dimensionally on the substrate.