IP Library › Granted Patent US 8,723,446
Granted Patent B2
US 8,723,446 · App. 12/992,091 · Granted May 13, 2014

Method and circuit arrangement for cycle-by-cycle control of a LED current flowing through a LED circuit arrangement, and associated circuit composition and lighting system

Inventors: Gian Hoogzaad (Mook, NL); Wilhelmus H. M. Langeslag (Wijchen, NL); Frans Pansier (Nuenen, NL); Cheng Zhang (Nijmegen, NL)
Assignee: NXP B.V.
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Quick Facts
Patent No.
US 8,723,446
App. No.
12/992,091
Granted
May 13, 2014
Kind
B2
Abstract

The invention provides a method for cycle-by-cycle control of a LED current (ILED) flowing through a LED circuit arrangement (LEDCIRC) at a mean LED current level. The method comprises a) establishing a converter current (IL), b) establishing an oscillation of the converter current (IL) between substantially a valley current level and substantially a peak current level, c) feeding the LED circuit arrangement (LEDCIRC) with the converter current (IL) as the LED current during a part of an oscillation cycle of the oscillation of the converter current, d) determining a current level correction for compensating a current level error between an integral over an oscillation cycle of the LED current and a reference, the reference being representative of the mean LED current level, and e) adjusting at least one of the valley current level and the peak current level with the current level correction for use in a successive cycle of the oscillation of the converter current. The invention also provides a circuit arrangement operable for using the method, a LED driver IC using the circuit arrangement, a circuit composition with at least one LED and the circuit arrangement, and a lighting system with the circuit composition.

Claims (96)

1. A method for cycle-by-cycle control of a LED current flowing through a LED circuit arrangement at a mean LED current level, the method comprising:

establishing a converter current;

establishing an oscillation of the converter current between substantially a valley current level and substantially a peak current level;

feeding the LED circuit arrangement with the converter current as the LED current during a part of an oscillation cycle of the oscillation of the converter current;

determining a current level correction for compensating a current level error between an integral over an oscillation cycle of the LED current and a reference, the reference being representative of the mean LED current level; and

adjusting at least one of the valley current level and the peak current level with the current level correction for use in a successive cycle of the oscillation of the converter current.

2. A circuit arrangement for cycle-by-cycle control of a LED current flowing through a LED circuit arrangement at a mean LED current level, the circuit arrangement comprising:

converter current establishing means for establishing a converter current;

oscillation means for establishing an oscillation of the converter current between substantially a valley current level and substantially a peak current level;

feeding means for feeding the LED circuit arrangement with the converter current as the LED current during a part of an oscillation cycle of the oscillation of the converter current;

determining means for determining a current level correction for compensating a current level error between an integral over an oscillation cycle of the LED current and a reference, the reference being representative of the mean LED current level; and

adjusting means for adjusting at least one of the valley current level and the peak current level with the current level correction for use in a successive cycle of the oscillation of the converter current.

3. The circuit arrangement according to claim 2 , wherein:

for establishing the oscillation of the converter current, the circuit arrangement comprises:

a converter current sensor operable to establish a converter current sensing signal representative of the current level of the converter current flowing in the circuit arrangement,

a hysteretic comparator operable to establish an upper trip signal and a lower trip signal as control crossover thresholds, the upper trip signal being associated with the peak current level of the converter current and the lower trip signal being associated with the valley current level of the converter current, the hysteretic comparator being in electrical communication with the converter current sensor to receive the converter current sensing signal), wherein the hysteretic comparator is operable to output a switching control signal at a first logic level in response to a crossover of the lower trip signal by the converter current sensing signal, and

wherein the hysteretic comparator is operable to output the switching control signal at a second logic level in response to a crossover of the upper trip signal by the converter current sensing signal, and

a switch-mode converter operable to control a flow of the converter current through the circuit arrangement, the switch-mode converter being in electrical communication with the hysteretic comparator to receive the switching control signal,

wherein the switch-mode converter controls an increase of the converter current from the valley current level to the peak current level in response to the switching control signal equalling the first logic level, and

wherein the switch-mode converter controls a decrease of the converter current from the peak current level to the valley current level in response to the switching control signal equalling the second logic level;

for determining the current level correction for compensating the current level error between the integral over the oscillation cycle of the LED current and the reference, the circuit arrangement comprises:

a correction calculator operable for determining the current level correction, the correction calculator being in electrical communication with the converter current sensor to receive the converter current sensing signal;

for adjusting at least one of the valley current level and the peak current level with the current level correction for use in a next cycle of the oscillation of the converter current, the circuit arrangement comprises:

a threshold controller operable for adjusting at least one of the upper trip signal and the lower trip signal, corresponding with adjusting the valley current level and the peak current level respectively, the threshold controller being in electrical communication with the correction calculator for receiving the current level correction and in electrical communication with the hysteretic comparator for delivering, after adjusting, the upper trip signal and the lower trip signal respectively.

4. The circuit arrangement according to claim 3 , wherein the correction calculator comprises:

an integration current establisher operable for establishing an integration current, the integration current being representative of the LED current, the integration current establisher being in electrical communication with the converter current sensor for receiving the converter current sensing signal;

a first current integrator operable for obtaining an actual current integral from:

receiving the integration current from the integration current establisher, and

integrating the integration current over the part of the oscillation cycle as the actual current integral;

a reference current establisher operable for establishing a reference current with a reference current level representative of the mean LED current level; and

a second current integrator operable for obtaining a reference current integral from:

receiving the reference current from the reference current establisher, and

integrating the reference current over the oscillation cycle as the reference current integral;

and wherein the correction calculator is operable for

determining the current level correction from at least the actual current integral and the reference current integral.

5. The circuit arrangement according to claim 4 , wherein

the correction calculator is operable for determining a multiplicative correction factor from dividing the reference current integral by at least the actual current integral, and

the threshold controller is operable for adjusting at least one of the valley current level and the peak current level by multiplying with the multiplicative correction factor.

6. The circuit arrangement according to claim 4 , wherein:

the correction calculator is operable for determining an additive correction term from:

obtaining a difference of the reference current integral and the actual current integral by subtracting the actual current integral from the reference current integral, and

dividing the difference by at least a time duration of the oscillation cycle, and

the threshold controller is operable for adjusting at least one of the valley current level and the peak current level by adding the additive correction term.

7. The circuit arrangement according to claim 6 , further comprising:

a constant current establisher operable for establishing a constant current with a constant current level;

a constant current integrator (ICONINT) operable for obtaining the time duration of the oscillation cycle from:

receiving the constant current,

integrating the constant current over the part of the oscillation cycle as an integrated constant current, and

normalizing the integrated constant current with the constant current level.

8. The circuit arrangement according to claim 3 , wherein the correction calculator comprises:

a reference current establisher operable for establishing a reference current with a reference current level representative of the mean LED current level;

an integration current establisher operable for establishing an integration current, the integration current being representative of the LED current, the integration current establisher being in electrical communication with the converter current sensor for receiving the converter current sensing signal; and wherein the correction calculator is operable for:

receiving the reference current from the reference current establisher;

receiving the integration current from the integration current establisher;

obtaining a current difference of the integration current and the reference current by subtracting the integration current from the reference current during the oscillation cycle;

integrating the current difference over the oscillation cycle to obtain the current level error; and

determining the current level correction from at least the current level error.

9. The circuit arrangement according to claim 8 , wherein:

the correction calculator is operable for determining an additive correction term from dividing the current level error by at least a time duration of the oscillation cycle and

the threshold controller is operable for adjusting at least one of the valley current level and the peak current level by adding the additive correction term.

10. The circuit arrangement according to claim 3 , wherein the switch-mode converter comprises:

a switch in electrical communication with the hysteretic comparator to be opened and closed as a function of the switching control signal,

a component selected from the group including a diode and a second switch, the second switch being in electrical communication with the hysteretic comparator to be closed and opened as a function of the switching control signal,

the component being in electrical communication with the switch via an output node,

the output node being, during use, in electrical communication with the LED circuit arrangement, and

the switch being arranged for charging and discharging an inductive output filter, the inductive output filter being, during use, in electrical communication with the LED circuit arrangement.

11. The circuit arrangement according to claim 2 , wherein, for integrating a specific current for obtaining a specific current integral over a fraction of the oscillation cycle, the circuit arrangement comprises:

a first reset circuit operable for:

resetting a first accumulator;

the first accumulator being operable for:

accumulating an integration current representative of the specific current over the fraction of the oscillation cycle on the first accumulator as a first accumulated integration current, and

for providing the first accumulated integration current from the first accumulator as the specific current integral after the fraction of the oscillation cycle has lapsed.

12. The circuit arrangement according to claim 11 , further comprising:

a second reset circuit operable for:

resetting a second accumulator while the integration current is accumulated on the first accumulator in a first oscillation cycle;

the second accumulator being operable for:

accumulating the integration current representative of the specific current over the fraction of the oscillation cycle in a second oscillation cycle on the second accumulator as a second accumulated integration current, the second oscillation cycle being successive to the first oscillation cycle, while the first accumulator is providing the accumulated integration current from the first accumulator as the specific current integral, and

providing the second accumulated integration current as the specific current integral after the fraction of the second oscillation cycle has lapsed.

13. The circuit arrangement according to claim 12 , wherein the first reset circuit and the second reset circuit are implemented with at least a common reset switch.

14. The circuit arrangement according to claim 2 , further comprising:

a LED segment controller in electrical communication with the LED circuit arrangement,

and

wherein the LED circuit arrangement comprises a first LED segment, a first switching element electrically parallel to the first LED segment, at least a second LED segment, a second switching element electrically parallel to the second LED segment,

the first and second switching elements being operable by the LED segment controller to select the path of the LED current to pass through the LED segment associated with the respective switching element or to bypass the LED segment associated with the respective switching element.

15. A LED driver IC comprising a first circuit arrangement according to claim 2 , associated, during use, with a first LED circuit arrangement.

16. A LED driver IC according to claim 15 , further comprising a second circuit arrangement including:

converter current establishing means for establishing a converter current;

oscillation means for establishing an oscillation of the converter current between substantially a valley current level and substantially a peak current level;

feeding means for feeding the LED circuit arrangement with the converter current as the LED current during a part of an oscillation cycle of the oscillation of the converter current;

determining means for determining a current level correction for compensating a current level error between an integral over an oscillation cycle of the LED current and a reference, the reference being representative of the mean LED current level; and

adjusting means for adjusting at least one of the valley current level and the peak current level with the current level correction for use in a successive cycle of the oscillation of the converter current,

associated, during use, with a second LED circuit arrangement.

17. A circuit composition comprising:

a circuit arrangement in accordance with claim 2 , and

a LED circuit arrangement comprising at least one LED, wherein the circuit arrangement is in electrical communication with the LED circuit arrangement for feeding the converter current to the LED circuit arrangement during the part of the oscillation cycle of the oscillation of the converter current.

18. A LED lighting system comprising a circuit arrangement according to claim 2 .

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2010
From: HOOGZAAD, GIAN; PANSIER, FRANS; ZHANG, CHENG; LANGESLAG, WILHELMUS HINDERIKUS MARIA
To: NXP B.V.
Reel/Frame 025348/0232 →
Priority Claims (1)
EP 08156072 · May 13, 2008 · regional
Continuity (1)
Related Publication 20110068713A1 · Mar 24, 2011