Fault management for a communication bus
View Patent ↗A differential communication bus comprising a master module and a plurality of slave modules connected to at least first and second conductors whereby to communicate between the master and slave modules. The master module comprises a driver for applying first and second voltages respectively to the first and second conductors and for sourcing and sinking currents in the first and second conductors. The driver controls a difference between the first and second voltages and a common mode value of the first and second voltages. The driver includes first sourcing and sinking current limiters and second sourcing and sinking current limiters for limiting the currents in the first and second conductors. The master module is selectively responsive to a fault condition triggering simultaneous activation of the first and second sourcing current limiters or of the first and second sinking current limiters to disable the driver.
1. A master module for a differential communication bus, the bus comprising at least first and second conductors whereby to communicate between the master module and a plurality of slave modules connected to the conductors of the bus, the master module comprising:
a driver for applying first and second voltages respectively to said first and second conductors and for sourcing and sinking currents in said first and second conductors, said driver controlling a difference between said first and second voltages and a common mode value of said first and second voltages, said driver including first sourcing and sinking current limiters and second sourcing and sinking current limiters for limiting said currents in said first and second conductors respectively;
wherein said master module is selectively responsive to a fault condition triggering simultaneous activation of said first and second sourcing current limiters or of said first and second sinking current limiters to generate a specific fault signal.
2. A master module as claimed in claim 1 , responsive to a fault condition triggering simultaneous activation of said first and second sourcing current limiters or of said first and second sinking current limiters to disable said driver.
3. A master module as claimed in claim 2 , comprising a controller responsive to limiter flag signals representative of activation of said current limiters for disabling said driver, said limiter flag signals being filtered to remove noise and/or transients.
4. A master module as claimed in claim 1 , wherein said driver is arranged during alternate periods to supply power to said slave modules and to communicate signals with said slave modules over said first and second conductors of the bus.
5. A master module as claimed in claim 1 , which is compliant with the Distributed Interface System bus standard.
6. A master module as claimed in claim 5 , which is compliant with version 2.02 of the Distributed Interface System bus standard.
7. A differential communication bus apparatus including a master module as claimed in claim 1 , said bus and said slave modules, said first and second conductors being connected to said master module and to said slave modules.
8. A differential communication bus apparatus as claimed in claim 7 , wherein said slave modules each include a semiconductor circuit having a substrate connected with one of said first and second conductors and said semiconductor circuit presenting at least one parasitic diode.
9. A differential communication bus as claimed in claim 7 , wherein said slave modules each include a capacitance for storing power supplied by said master module over said first and second conductors.
10. A master module as claimed in claim 2 , wherein said driver is arranged during alternate periods to supply power to said slave modules and to communicate signals with said slave modules over said first and second conductors of the bus.
11. A master module as claimed in claim 3 , wherein said driver is arranged during alternate periods to supply power to said slave modules and to communicate signals with said slave modules over said first and second conductors of the bus.
12. A master module as claimed in claim 2 , which is compliant with the Distributed Interface System bus standard.
13. A master module as claimed in claim 3 , which is compliant with the Distributed Interface System bus standard.
14. A master module as claimed in claim 4 , which is compliant with the Distributed Interface System bus standard.
15. A differential communication bus apparatus including a master module as claimed in claim 6 , said bus and said slave modules, said first and second conductors being connected to said master module and to said slave modules.
16. A differential communication bus apparatus including a master module as claimed in claim 2 , said bus and said slave modules, said first and second conductors being connected to said master module and to said slave modules.
17. A differential communication bus apparatus including a master module as claimed in claim 3 , said bus and said slave modules, said first and second conductors being connected to said master module and to said slave modules.
18. A differential communication bus apparatus including a master module as claimed in claim 4 , said bus and said slave modules, said first and second conductors being connected to said master module and to said slave modules.
19. A differential communication bus apparatus including a master module as claimed in claim 5 , said bus and said slave modules, said first and second conductors being connected to said master module and to said slave modules.
20. A differential communication bus as claimed in claim 8 , wherein said slave modules each include a capacitance for storing power supplied by said master module over said first and second conductors.