IP Library Granted Patent US 8,487,701
Granted Patent B2
US 8,487,701 · App. 13/002,594 · Granted Jul 16, 2013

Circuit for amplifying a signal representing a variation in resistance of a variable resistance and corresponding sensor

Inventors: El Mehdi Boujamaa (Montpellier, FR); Pascal Nouet (Combaillaux, FR); Frederick Mailly (Montferrier-sur-Lez, FR); Laurent Latorre (Claret, FR)
Assignee: Centre National de la Recherche Scientifique (C.N.R.S.)
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Quick Facts
Patent No.
US 8,487,701
App. No.
13/002,594
Granted
Jul 16, 2013
Kind
B2
Abstract

A circuit for amplifying a signal representing a variation in resistance of a variable resistance comprising at least one first load linked to an output terminal of a first transistor whose other terminal is associated with a variable resistance, in such a way as to allow the recovery of the amplified signal at the terminals of the first load.

Claims (28)

1. A circuit for amplifying a signal representing a variation in resistance of a variable resistor sensitive to a physical quantity to be measured comprising:

at least a first load connected to an output terminal of a first transistor, an input terminal of the first transistor being connected directly to a reference resistor, and

a second transistor having an input terminal connected directly to the variable resistor and an output terminal connected to a second load,

wherein the circuit is capable of recovering an amplified signal at the terminals of the first load, and wherein

a control electrode of the first transistor is connected directly to both the control electrode and to the output electrode of the second transistor,

the first load comprises a third transistor comprising an output electrode connected to the output electrode of the first transistor,

the second load comprises a fourth transistor comprising an output electrode connected to the output electrode of the second transistor,

a control electrode of the third transistor is connected directly to both a control electrode and to an output electrode of the fourth transistor, and

an input electrode, respectively an output electrode, corresponding either to a source electrode, respectively a drain electrode, of a corresponding transistor for a metal oxide semiconductor (MOS) field effect transistor, or to an emitter electrode, respectively a collector electrode, of the corresponding transistor for a bipolar transistor.

2. A circuit according to claim 1 , wherein the reference resistor is also a variable resistor.

3. A circuit according to claim 1 , wherein each of the first and second loads comprise at least one resistor.

4. A circuit according to claim 3 , wherein the resistors of the first and second loads are variable resistors.

5. A circuit according to claim 1 , wherein each of the first and second loads comprises two transistors.

6. A circuit according to claim 1 comprising a sampler or a switch for sampling or switching the signal corresponding to the variation in resistance, so as to reduce a low-frequency noise of the circuit.

7. A circuit according to claim 6 , wherein the sampler or switch is capable of correlated double sampling (CDS) of the signal corresponding to the variation in resistance.

8. A circuit according to claim 1 comprising a modulator for modulating the amplitude of the signal representing the variation in resistance, so as to reduce the impact of low-frequency noise of the transistors of said circuit.

9. A circuit according to claims 1 comprising a feedback stabilizer for stabilizing bias point and gain of said circuit.

10. A sensor comprising an amplification circuit according to Claim 1 .

11. A sensor according to claim 10 selected from the group consisting of:

a piezoresistive sensor;

a pressure sensor;

a temperature sensor;

an acceleration sensor;

an inclination sensor;

a microphone; and

a magnetic field sensor.

12. The circuit according to claim 1 , wherein the first transistor and the second transistor are MOS field effect transistors or bipolar transistors.

13. A circuit according to claim 1 , wherein the first, the second, the third and the fourth transistors are MOS field effect transistors or bipolar transistors.

Assignments (3)
MERGER Recorded Sep 14, 2017
From: UNIVERSITE DE MONTPELLIER 2 - SCIENCES ET TECHNIQUES
To: UNIVERSITÉ DE MONTPELLIER
Reel/Frame 043590/0800 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2014
From: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (C.N.R.S)
To: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (C.N.R.S); UNIVERSITE DE MONTPELLIER 2 - SCIENCES ET TECHNIQUES
Reel/Frame 033785/0212 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2011
From: BOUJAMAA, EL MEHDI; NOUET, PASCAL; MAILLY, FREDERICK; LATORRE, LAURENT
To: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (C.N.R.S.)
Reel/Frame 026427/0903 →
Priority Claims (1)
FR 08 54585 · Jul 4, 2008 · national
Continuity (1)
Related Publication 20110248783A1 · Oct 13, 2011