IP Library Granted Patent US 8,558,463
Granted Patent B2
US 8,558,463 · App. 13/004,283 · Granted Oct 15, 2013

LED matrix open/short detection apparatus and method

Inventors: Etsuji Sato (Singapore, SG); Chun Kiong Leslie Khoo (Singapore, SG); Jiong Fu (Singapore, SG); Maung Zabu Ko (Singapore, SG); Shuang Zhang (Singapore, SG); Muhammad S/O Abuturab (Singapore, SG)
Assignees: Panasonic Corporation; Panasonic Semiconductor Asia Pte. Ltd.
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Quick Facts
Patent No.
US 8,558,463
App. No.
13/004,283
Granted
Oct 15, 2013
Kind
B2
Abstract

An apparatus to detect faulty connection of LED (open/short conditions) which may affect the function of LED display panel is presented. The apparatus basically controls the switches through control algorithm circuit to get the information of LED driver output pins voltage and compare them with two reference voltages to determine the open/short condition of individual LED.

Claims (27)

1. An apparatus for detecting an open or short condition of a light emitting diode (LED) in a LED panel, the apparatus comprising:

a LED driver system to control the LED panel;

a control algorithm circuit to control the LED driver system;

a connection switches circuit to connect an output pin of the LED to a non-inverting input terminal of a comparator;

a comparator to compare a voltage of the LED output pin with first and second reference voltages;

a reference generation circuit to generate the first and second reference voltages,

wherein the LED driver system includes:

a first current source connected to a first terminal of the LED and controlled by a final from the control algorithm circuit, and

a second current source connected to a second terminal of the LED and controlled by a signal from the control algorithm circuit.

2. The apparatus according to claim 1 , further comprising:

a level shifter circuit to level shift input direct current (DC) voltage levels to a first reference DC voltage level.

3. The apparatus according to claim 2 , wherein the first reference DC voltage level is a first power supply voltage.

4. The apparatus according to claim 2 , wherein the first reference voltage is generated by voltage dividing a second power supply voltage.

5. The apparatus according to claim 2 , wherein the second reference voltage is generated via a small voltage drop across a resistor from a third power supply voltage.

6. The apparatus according to claim 5 , wherein the first reference voltage is lower in amplitude compared to the second reference voltage.

7. The apparatus according to claim 5 , wherein the third power supply voltage is the same as the first reference DC voltage level.

8. The apparatus according to claim 2 , wherein the connection switches circuit comprises a combination of a plurality of switches.

9. The apparatus according to claim 8 , wherein the switches are transmission gates.

10. The apparatus according to claim 1 , wherein the first current source is a metal oxide semiconductor transistor.

11. The apparatus according to claim 1 , further comprising:

a Signal Pass block to allow conditional outputting of LED output pin select signals outputted by said control algorithm circuit, based on an Enable signal; and

an Output Pass block to allow conditional outputting of a status of the open or short condition of the LED under test, based on the Enable signal.

12. The apparatus according to claim 11 , wherein the Signal Pass block is an AND logic circuit, comprising an array of AND gates.

13. The apparatus according to claim 12 , wherein the Output Pass block is a logic AND gate.

14. The apparatus according to claim 1 , wherein the LED driver system further includes:

a third current source connected to the second terminal of said LED and controlled by a signal from the control algorithm circuit, and

a fourth current source connected to the first terminal of said LED and controlled by a signal from the control algorithm circuit.

Assignments (5)
CHANGE OF NAME Recorded Jan 27, 2022
From: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
To: NUVOTON TECHNOLOGY CORPORATION JAPAN
Reel/Frame 058886/0144 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 053629/0966 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2020
From: PANASONIC ASIA PACIFIC PTE. LTD.
To: NUVOTON TECHNOLOGY SINGAPORE PTE. LTD.
Reel/Frame 053630/0625 →
MERGER Recorded Aug 27, 2020
From: PANASONIC SEMICONDUCTOR ASIA PTE. LTD.
To: PANASONIC ASIA PACIFIC PTE. LTD.
Reel/Frame 053623/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2011
From: SATO, ETSUJI; KHOO, CHUN KIONG LESLIE; FU, JIONG; KO, MAUNG ZABU; ZHANG, SHUANG; ABUTURAB, MUHAMMAD S/O
To: PANASONIC CORPORATION; PANASONIC SEMICONDUCTOR ASIA PTE.LTD.
Reel/Frame 026139/0553 →
Continuity (1)
Related Publication 20120176039A1 · Jul 12, 2012