Structure and method for dual work function metal gate CMOS with selective capping
A CMOS device having an NMOS transistor with a metal gate electrode comprising a mid-gap metal with a low work function/high oxygen affinity cap and a PMOS transistor with a metal gate electrode comprising a mid gap metal with a high work function/low oxygen affinity cap and method of forming.
1. A device comprising:
an NMOS transistor with a first gate dielectric, first mid-gap metal gate, and a first cap layer, wherein the first cap layer comprises a material having a high oxygen affinity and low work function; and
a PMOS transistor with a second gate dielectric, second mid gap metal gate and a second cap layer, wherein the second cap layer comprises a material having a low oxygen affinity and high work function.
2. The device of claim 1 , wherein the first mid-gap metal gate has a lower oxygen concentration than the second mid-gap metal gate and wherein low work function material from the first cap layer is incorporated at an interface between the first mid-gap metal gate and the first gate dielectric.
3. The device of claim 1 , wherein the first cap layer comprises Al.
4. The device of claim 1 , wherein the first cap layer comprises a material selected from the group consisting of Al, Ti, Ta, Y, Hf, and lanthides.
5. The device of claim 4 , wherein the second cap layer is selected from the group consisting of W, Mo, Pt, Re, and Ir.
6. The device of claim 1 , wherein the second cap layer comprises W.
7. The device of claim 1 , wherein the NMOS transistor further comprises the second cap layer separated from the first mid-gap metal gate by the first cap layer.
8. The device of claim 1 , wherein the PMOS device further comprises the first cap layer separated from the second mid-gap metal gate by the second cap layer.
9. The device of claim 1 , wherein the first mid-gap metal gate and the second mid-gap metal gate comprise the same mid-gap metal.
10. A method of forming a device, comprising the steps of:
providing a semiconductor body having a NMOS gate stack, a PMOS gate stack, and an oxide layer formed thereon, wherein the NMOS gate stack comprises a first gate dielectric, a first mid-gap metal gate, and a first dummy poly layer and the PMOS gate stack comprises a second gate dielectric, a second mid-gap metal gate, and a second dummy poly layer;
removing the first dummy poly layer;
forming a first cap layer over the first mid-gap metal gate, the first cap layer comprising a high oxygen affinity and low work function material;
removing the second dummy poly layer;
forming a second cap layer over the second mid-gap metal gate, the second cap layer comprising a low oxygen affinity and high work function material;
after removing the second dummy poly layer and prior to forming the second cap layer, performing a low temperature oxidation to incorporate oxygen into the second mid-gap metal gate; and
annealing to incorporate low work function material from the first cap layer into the first mid-gap metal gate at the interface between the first mid-gap metal gate and the first gate dielectric.
11. The method of claim 10 , wherein the first cap layer comprises Al.
12. The method of claim 11 , wherein the second cap layer comprises W.
13. The method of claim 10 , wherein the first cap layer comprises a material selected from the group consisting of Al, Ti, Ta, Y, Hf, and lanthides and wherein the second cap layer is selected from the group consisting of W, Mo, Pt, Re, and Ir.
14. The method of claim 10 , wherein the second dummy poly layer is removed prior to removing the first dummy poly layer.
15. The method of claim 10 , wherein the step of forming the second cap layer comprises:
depositing the second cap layer over both the NMOS gate stack and the PMOS gate stack; and
removing the second cap layer from the NMOS gate stack;
and wherein the step of forming the first cap layer comprises:
after removing the second cap layer from the NMOS gate stack, depositing the first cap layer over both the NMOS gate stack and the second cap layer of the PMOS gate stack.
16. The method of claim 15 , wherein the second cap layer is a thin cap layer compared to the first cap layer.
17. A device comprising:
an NMOS transistor with a first gate dielectric, first mid-gap metal gate, and a first cap layer, wherein the first cap layer comprises Aluminum having a high oxygen affinity and low work function; and
a PMOS transistor with a second gate dielectric, second mid-gap metal gate and a second cap layer, wherein the second cap layer comprises Tungsten having a low oxygen affinity and high work function, wherein the first mid-gap metal gate and the second mid-gap metal gate comprise the same mid-gap metal material.