Semiconductor device and method of manufacture thereof

1. A method of manufacturing a semiconductor device, the method comprising:

manufacturing a first semiconductor chip comprising a first coil;

manufacturing a second semiconductor chip comprising a second coil, wherein bonding the first semiconductor chip with the second semiconductor chip comprises bonding the first semiconductor chip with the second semiconductor chip via an intermediate isolation film, and wherein the intermediate isolation film is a double sided adhesive film or an attach paste comprising polyimide or epoxide having a dielectric strength between 60 kV/mm to 100 kV/mm;

aligning the first semiconductor chip with the second semiconductor chip so that the first coil is arranged opposite to the second coil; and

bonding the first semiconductor chip with the second semiconductor chip.

2. The method according to claim 1 , wherein the intermediate isolation film comprises a thickness of 20 μm to 500 μm.

3. The method according to claim 1 , wherein aligning the first semiconductor chip with the second semiconductor chip comprises placing the first semiconductor chip face-to-face to the second semiconductor chip.

4. The method according to claim 1 , further comprising thinning a substrate of the second semiconductor chip to a thickness of 60 μm to 300 μm.

5. The method according to claim 4 , further comprising etching a through-via in the substrate of the second semiconductor chip.

6. The method according to claim 5 , further comprising electrically connecting a connection pad of the second semiconductor chip through the through substrate via with a lead frame.

7. A method for transmitting a signal, the method comprising:

receiving a signal at a first connection pad of a first semiconductor chip;

transforming the signal from a first coil on the first semiconductor chip to a second coil on a second semiconductor chip; and

sending the signal via a second connection pad of the second semiconductor chip, wherein the first semiconductor chip and the second semiconductor chip together form a transformer, wherein the first semiconductor chip and the second semiconductor chip are attached to each other with an adhesive film or an attach paste comprising polyimide or epoxide having a dielectric strength between 60 kV/mm to 100 kV/mm.

8. The method according to claim 7 , wherein the first semiconductor chip and the second semiconductor chip are galvanically separated.

9. The method according to claim 7 , wherein the adhesive film or the attach paste comprises a thickness of 20 μm to 500 μm.

10. A method of manufacturing a coreless transformer, the method comprising:

forming a first coil and a first contact pad on a first side of a first semiconductor substrate;

forming a through via on a second side of the first semiconductor substrate exposing the first contact pad;

disposing an isolation film on the first side of the first semiconductor substrate;

placing the first semiconductor substrate on a second semiconductor substrate such that the isolation film is between the first semiconductor substrate and the second semiconductor substrate, the second semiconductor substrate comprising a second coil and a second contact pad;

placing the second semiconductor substrate on a lead frame;

connecting the first contact pad to the lead frame; and

connecting the second contact pad to the lead frame,

wherein disposing the isolation film comprises adhesive bonding an adhesive film comprising polyimide with a dielectric strength of 60 kV/mm to 100 kV/mm.

11. The method according to claim 10 , wherein connecting the first contact pad to the lead frame comprises wire bonding the first contact pad to the lead frame and wherein connecting the second contact pad to the lead frame comprises wire bonding the second contact pad to the lead frame.

12. The method according to claim 10 , further comprising thinning the first semiconductor substrate before forming the through via on the second side of the first semiconductor substrate.

13. A method of manufacturing a coreless transformer, the method comprising:

forming a first coil and a first contact pad on a first side of a first semiconductor substrate;

forming a through via on a second side of the first semiconductor substrate exposing the first contact pad;

disposing an isolation film on the first side of the first semiconductor substrate;

placing the first semiconductor substrate on a second semiconductor substrate such that the isolation film is between the first semiconductor substrate and the second semiconductor substrate, the second semiconductor substrate comprising a second coil and a second contact pad;

placing the second semiconductor substrate on a lead frame;

connecting the first contact pad to the lead frame; and

connecting the second contact pad to the lead frame,

wherein disposing the isolation film comprises adhesive pasting a polyimide film with a dielectric strength of 60 kV/mm to 100 kV/mm.

14. A method of manufacturing a coreless transformer, the method comprising:

forming a first coil and a first contact pad on a first side of a first semiconductor substrate:

forming a through via a second side of the first semiconductor substrate exposing the first contact pad;

disposing an isolation film on the first side of the first semiconductor substrate;

placing the first semiconductor substrate on a second semiconductor substrate such that the isolation film is between the first semiconductor substrate and the second semiconductor substrate, the second semiconductor substrate comprising a second coil and a second contact pad;

placing the second semiconductor substrate on a lead frame;

connecting the first contact pad to the lead frame; and

connecting the second contact pad to the lead frame,

wherein disposing the isolation film comprises adhesive pasting an epoxide film with a dielectric strength of 60 kV/mm to 100 kV/mm.