Memory devices having source lines directly coupled to body regions and methods
View Patent ↗Memory devices, memory cell strings and methods of operating memory devices are shown. Configurations described include directly coupling an elongated body region to a source line. Configurations and methods shown should provide a reliable bias to a body region for memory operations such as erasing.
1. A memory device, comprising:
an elongated body region, having a source region coupled to a first end, and a drain region coupled to a second end;
a plurality of gates along a length of the elongated body region, each of the plurality of gates being separated from the elongated body region by at least a charge storage structure; and
a source line directly coupled to the body region.
2. The memory device of claim 1 , wherein the elongated body region is oriented vertically.
3. The memory device of claim 1 , wherein the elongated body region is oriented horizontally.
4. The memory device of claim 1 , wherein the elongated body region forms a “U” shape.
5. The memory device of claim 1 , further including a first select gate adjacent to a first end of the elongated body region and a second select gate adjacent to a second end of the elongated body region.
6. A memory device, comprising:
a p type elongated body region, having an n type source region coupled to a first end, and an n type drain region coupled to a second end;
a plurality of gates along a length of the p type elongated body region, each of the plurality of gates being separated from the p type body region by at least a respective charge storage structure;
a first select gate adjacent to a first end of the body region;
a second select gate adjacent to a second end of the body region;
a source line directly coupled to the p type elongated body region at an end of the body region;
wherein the n type source region substantially surrounds a cross section of an end of the p type elongated body region and is also coupled to the source line.
7. The memory device of claim 6 , wherein at least the end of the p type elongated body region is formed from p+ doped polysilicon.
8. The memory device of claim 6 , wherein the n type source region is formed from n+ polysilicon.
9. The memory device of claim 6 , wherein the n type drain region is formed from n+ polysilicon.
10. The memory device of claim 6 , wherein the p type elongated body region forms a “U” shape.
11. The memory device of claim 10 , wherein the source line is stacked on top of the n type source region.
12. A memory device, comprising:
a U shaped memory cell string, including:
an elongated body region, having a first and second upward facing end;
a drain region coupled to the first upward facing end;
a source region coupled to the second upward facing end;
a plurality of gates along a length of the elongated body region;
a data line coupled to the drain region; and
a source line directly coupled to the second upward facing end of the elongated body region and coupled to the source region.
13. The memory device of claim 12 , wherein the source line and the source region are shared with an adjacent memory cell string.
14. The memory device of claim 12 , wherein the source region substantially surrounds a cross section of the second upward facing end of the elongated body region.
15. The memory device of claim 12 , wherein the gates are shared with an adjacent memory cell string.
16. The memory device of claim 14 , wherein a first portion of the gates are shared with a first adjacent memory cell string and wherein a second portion of the gates are shared with a second adjacent memory cell string.