IP Library Granted Patent US 8,753,460
Granted Patent B2
US 8,753,460 · App. 13/015,638 · Granted Jun 17, 2014

Reduction of edge chipping during wafer handling

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Quick Facts
Patent No.
US 8,753,460
App. No.
13/015,638
Granted
Jun 17, 2014
Kind
B2
Abstract

Methods and systems for reinforcing the periphery of a semiconductor wafer bonded to a carrier are disclosed. In one embodiment, additional adhesive is applied to the semiconductor wafer prior to bonding. The additional adhesive seeps into a crevice between the carrier and wafer and provides reinforcement. In another embodiment, adhesive is applied to the crevice by a dispenser after the wafer is bonded to the glass carrier.

Claims (12)

1. A method for reducing edge chipping on a semiconductor wafer having a wafer radius, comprising the steps of:

a) spinning the semiconductor wafer in an apply tool at a speed ranging from 10 rpm to 50 rpm;

b) dispensing an adhesive in a center zone on a top surface of the semiconductor wafer, wherein the center zone has a center zone radius ranging between 0.1 times the wafer radius to 0.4 times the wafer radius;

c) spinning the semiconductor wafer in the apply tool at a speed ranging from about 800 rpm to about 2000 rpm, followed by;

d) spinning the semiconductor wafer in the apply tool at a speed ranging from about 10 rpm to about 50 rpm;

e) dispensing said adhesive in an outer zone on the top surface of the semiconductor wafer, wherein the outer zone comprises a region between the wafer radius and a second radius, wherein the second radius ranges between 0.8 times the wafer radius to 0.99 times the wafer radius, and wherein said adhesive comprises a polyimide adhesive;

f) spinning the semiconductor wafer in the apply tool at a speed ranging from about 800 rpm to about 2000 rpm; and

g) disposing a glass carrier onto the top surface of the semiconductor wafer, thereby forming a glass-wafer structure comprising a crevice between the glass carrier and the semiconductor wafer, and forming an adhesive accumulation in the crevice.

2. The method of claim 1 , wherein disposing a glass carrier onto the top surface of the semiconductor wafer comprises applying a compressive force on the glass carrier and semiconductor wafer ranging from about 6 to about 95 kilo-Newtons.

3. The method of claim 2 , wherein the compressive force is applied in an environment having a temperature in the range of about 110 to about 390 degrees Celsius.

4. The method of claim 3 , wherein the compressive force is applied for a time period ranging from 10 to 600 seconds.

5. The method of claim 1 , further comprising grinding the semiconductor wafer to a thickness ranging from about 32 micrometers to about 495 micrometers.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052561/0161 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2011
From: KNICKERBOCKER, SARAH H; GRIFFITH, JONATHAN H
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 025710/0452 →