IP Library Granted Patent US 8,962,443
Granted Patent B2
US 8,962,443 · App. 13/017,414 · Granted Feb 24, 2015

Semiconductor device having an airbridge and method of fabricating the same

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Quick Facts
Patent No.
US 8,962,443
App. No.
13/017,414
Granted
Feb 24, 2015
Kind
B2
Abstract

A method of forming a device having an airbridge on a substrate includes forming a plated conductive layer of the airbridge over at least a photoresist layer on a portion of the substrate, the plated conductive layer defining a corresponding opening for exposing a portion of the photoresist layer. The method further includes undercutting the photoresist layer to form a gap in the photoresist layer beneath the plated conductive layer at the opening, and forming an adhesion layer on the plated conductive layer and the exposed portion of the photoresist layer, the adhesion layer having a break at the gap beneath the plated conductive layer. The photoresist layer and a portion of the adhesion layer formed on the exposed portion of the photoresist layer is removed, which includes etching the photoresist layer through the break in the adhesion layer. An insulating layer is formed on at least the adhesion layer, enhancing adhesion of the insulating layer to the plated conductive layer.

Claims (23)

1. A method of forming a device having an airbridge on a substrate, the method comprising:

forming a plated conductive layer of the airbridge over at least a photoresist layer on a portion of the substrate, the plated conductive layer defining a corresponding opening for exposing a portion of the photoresist layer;

undercutting the photoresist layer to form a gap in the photoresist layer beneath the plated conductive layer at the opening;

forming an adhesion layer on the plated conductive layer and the exposed portion of the photoresist layer, the adhesion layer having a break at a gap beneath the plated conductive layer;

removing the photoresist layer and a portion of the adhesion layer formed on the exposed portion of the photoresist layer, the removing comprising etching the photoresist layer through the break in the adhesion layer; and

forming an insulating layer on at least the adhesion layer, which enhances adhesion of the insulating layer to the plated conductive layer.

2. The method of claim 1 , wherein the adhesion layer covers at least a portion of sidewalls of the opening in the plated conductive layer.

3. The method of claim 1 , wherein the adhesion layer formed on the exposed portion of the photoresist layer is lifted off by the etching of the photoresist layer.

4. The method of claim 1 , wherein undercutting the photoresist layer comprises applying oxygen plasma to the exposed portion of the photoresist layer.

5. The method of claim 1 , wherein the plated conductive layer comprises gold, and the insulating layer comprises silicon nitride.

6. The method of claim 5 , wherein the adhesion layer comprises titanium.

7. The method of claim 5 , wherein the adhesion layer comprises tantalum.

8. The method of claim 5 , wherein the adhesion layer comprises titanium oxide.

9. The method of claim 1 , further comprising:

forming a conductive seed layer electrically connected to the substrate and the photoresist layer; and

forming the plated conductive layer on the conductive seed layer, the opening in the plated conductive layer initially exposing a portion of the conductive seed layer.

10. The method of claim 9 , further comprising:

etching the exposed portion of the conductive seed layer to expose the exposed portion of the photoresist layer in the opening in the plated conductive layer before undercutting the photoresist layer to form the gap beneath the plated conductive layer.

11. The method of claim 10 , wherein the conductive seed layer comprises plated gold.

12. The method of claim 11 , further comprising:

forming a conductive lower layer electrically connected to the substrate and the photoresist layer; and

forming the conductive seed layer on the conductive lower layer,

wherein the conductive lower layer comprises titanium tungsten.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
MERGER Recorded May 7, 2013
From: AVAGO TECHNOLOGIES WIRELESS IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030369/0471 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2011
From: WHETTEN, TIMOTHY J.; RICHLING, WAYNE P.
To: AVAGO TECHNOLOGIES WIRELESS IP (SINGAPORE) PTE. LTD.
Reel/Frame 025721/0837 →