Electronic circuit having shared leakage current reduction circuits
View Patent ↗An electronic circuit includes a plurality of circuit blocks, a plurality of bias circuits, a switching circuit, and plurality of transistors. The plurality of circuit blocks each includes a high power terminal and a low power terminal. The switching circuit includes a plurality of switches for selectively coupling a bias circuit of the plurality of bias circuits to the low power terminal of a circuit block of the plurality of circuit blocks. Each bias circuit of the plurality of bias circuits is selectively couplable to the low power terminal of each of the plurality of circuit blocks. Each transistor of the plurality of transistors has a first current terminal coupled to a circuit ground terminal, and each transistor of the plurality of transistors has a control terminal for controlling the conductivity of the plurality of the transistors by a bias circuit of the plurality of bias circuits.
1. An electronic circuit comprising:
a plurality of circuit blocks, each circuit block of the plurality of circuit blocks including a first power terminal and a second power terminal, wherein the first power terminals of the plurality of circuit blocks are not directly coupled electrically;
a plurality of bias circuits for controlling current leakage reduction of the plurality of circuit blocks;
a switching circuit including a plurality of switches for selectively coupling a bias circuit of the plurality of bias circuits to the first power terminal of a circuit block of the plurality of circuit blocks, where each bias circuit is selectively couplable to each of the first power terminals of the plurality of circuit blocks and is concurrently couplable to more than one first power terminal of the plurality of circuit blocks via the switching circuit; and
a plurality of leakage reduction transistors, each leakage reduction transistor of the plurality of leakage reduction transistors including a first current terminal coupled to a power supply voltage terminal, the plurality of bias circuits controlling the conductivity of the plurality of leakage reduction transistors to reduce leakage current of the plurality of circuit blocks, wherein each transistor of the plurality of transistors includes a control terminal for controlling the conductivity of the leakage reduction transistor.
2. An electronic circuit comprising:
a plurality of circuit blocks, each circuit block of the plurality of circuit blocks including a first power terminal and a second power terminal;
a plurality of bias circuits for controlling current leakage reduction of the plurality of circuit blocks;
a switching circuit including a plurality of switches for selectively coupling a bias circuit of the plurality of bias circuits to the first power terminal of a circuit block of the plurality of circuit blocks, where each bias circuit is selectively couplable to each of the plurality of circuit blocks and is concurrently couplable to more than one circuit block of the plurality of circuit blocks via the switching circuit;
a plurality of leakage reduction transistors, each leakage reduction transistor of the plurality of leakage reduction transistors including a first current terminal coupled to a power supply voltage terminal, the plurality of bias circuits controlling the conductivity of the plurality of leakage reduction transistors to reduce leakage current of the plurality of circuit blocks, wherein each transistor of the plurality of transistors includes a control terminal for controlling the conductivity of the leakage reduction transistor; and
a controller, the controller controlling the switching circuit for selectively coupling a bias circuit of the plurality of bias circuits to the first power terminal of a circuit block of the plurality of circuit blocks for reducing the leakage current of the circuit block, wherein the controller selects which bias circuit of the plurality of bias circuits to selectively couple to the first power terminal of a circuit block based on a measured leakage current value for the circuit block.
3. The electronic circuit of claim 2 further comprising:
at least one temperature sensor, wherein the controller selects which bias circuit of the plurality of bias circuits to selectively couple to the first power terminal of a circuit block further based on temperature information from the at least one temperature sensor.
4. An electronic circuit comprising:
a plurality of circuit blocks, each circuit block of the plurality of circuit blocks including a first power terminal and a second power terminal;
a plurality of bias circuits for controlling current leakage reduction of the plurality of circuit blocks;
a switching circuit including a plurality of switches for selectively coupling a bias circuit of the plurality of bias circuits to the first power terminal of a circuit block of the plurality of circuit blocks, where each bias circuit is selectively couplable to each of the plurality of circuit blocks and is concurrently couplable to more than one circuit block of the plurality of circuit blocks via the switching circuit; and
a plurality of leakage reduction transistors, each leakage reduction transistor of the plurality of leakage reduction transistors including a first current terminal coupled to a power supply voltage terminal, the plurality of bias circuits controlling the conductivity of the plurality of leakage reduction transistors to reduce leakage current of the plurality of circuit blocks, wherein each transistor of the plurality of transistors includes a control terminal for controlling the conductivity of the leakage reduction transistor, and wherein:
each leakage reduction transistor of the plurality of leakage reduction transistors is associated with a circuit block of the plurality of circuit blocks, wherein each leakage reduction transistor of the plurality of leakage reduction transistors includes a second current terminal coupled to the first power terminal of its associated circuit block; and
wherein the switching circuitry selectively couples a bias circuit of the plurality of bias circuits to the control terminal of the leakage reduction transistor of the plurality of leakage reduction transistors, where each bias circuit is selectively couplable to the control terminal of each leakage reduction transistor via the switching circuitry.
5. The electronic circuit of claim 4 wherein each bias circuit of the plurality of bias circuits includes a sense line, wherein the sense line of each bias circuit of the plurality of bias circuits is selectively couplable to the first power terminal of each circuit block of the plurality of circuit blocks via the switching circuit.
6. The electronic circuit of claim 1 wherein:
each leakage reduction transistor of the plurality of leakage reduction transistors is associated with a bias circuit of the plurality of bias circuits, wherein each leakage reduction transistor of the plurality of leakage reduction transistors includes a second current terminal; and
the second current terminal of each leakage reduction transistor of the plurality of leakage reduction transistors is selectively couplable to the first power terminal of each circuit of the plurality of circuit blocks via the switching circuit.
7. The electronic circuit of claim 1 wherein the power supply terminal is a circuit ground terminal and the first power terminal of a circuit block is a low voltage power terminal of the circuit block.
8. The electronic circuit of claim 1 wherein each bias circuit of the plurality of bias circuits is characterized as being a self biasing circuit.
9. An electronic circuit comprising:
a plurality of circuit blocks, each circuit block of the plurality of circuit blocks including a high power terminal and a low power terminal;
a plurality of bias circuits;
a switching circuit including a plurality of switches for selectively coupling a bias circuit of the plurality of bias circuits to the low power terminal of a circuit block of the plurality of circuit blocks, where each bias circuit of the plurality of bias circuits is selectively couplable to the low power terminal of each of the plurality of circuit blocks; and
a plurality of transistors, each transistor of the plurality of transistors including a first current terminal coupled to a circuit ground terminal, wherein each transistor of the plurality of transistors includes a control terminal for controlling the conductivity of the plurality of the transistors by a bias circuit of the plurality of bias circuits, and
wherein each transistor of the plurality of transistors is associated with a circuit block of the plurality of circuit blocks, wherein each transistor of the plurality of transistors includes a second current terminal coupled to the low power terminal of its associated circuit block; and
wherein the switching circuitry selectively couples a bias circuit of the plurality of bias circuits to the control terminal of a transistor of the plurality of transistors, where each bias circuit is selectively couplable to the control terminal of each transistor of the plurality of transistors via the switching circuitry for controlling the conductivity of the each transistor.
10. The electronic circuit of claim 9 wherein each bias circuit is concurrently couplable to the low power terminal of more than one circuit block of the plurality of circuit blocks via the switching circuit.
11. The electronic circuit of claim 9 wherein each bias circuit of the plurality of bias circuits includes a sense line, wherein the sense line of each bias circuit of the plurality of bias circuits is selectively couplable to the low power terminal of each circuit block of the plurality of circuit blocks via the switching circuit.
12. The electronic circuit of claim 9 wherein each bias circuit of the plurality of bias circuits is characterized as being a self biasing circuit.
13. The electronic circuit of claim 9 further comprising:
a controller, the controller controlling the switching circuit for selectively coupling a bias circuit of the plurality of bias circuits to the low power terminal of a circuit block of the plurality of circuit blocks for reducing the leakage current of the circuit module, wherein the controller selects which bias circuit of the plurality of bias circuits to selectively couple to the low power terminal of the circuit block based on a measured leakage current value for the circuit block.
14. An electronic circuit comprising:
a plurality of circuit blocks, each circuit block of the plurality of circuit blocks includes a power terminal;
a plurality of transistors, each transistor of the plurality of transistors is associated with a circuit module of the plurality of circuit modules, wherein each transistor of the plurality of transistors includes a first current terminal coupled to a power supply terminal and a second current terminal coupled to the power terminal of its associated circuit module, each transistor of the plurality of transistors includes a control terminal for controlling the conductivity of the transistor;
a plurality of bias circuits; and
a switching circuit including a plurality of switches for selectively coupling a bias circuit of the plurality of bias circuits to the first power supply terminal of a circuit block of the plurality of circuit blocks and a control terminal of a transistor of the plurality of transistors associated with the circuit block, where each bias circuit is selectively couplable to the first power terminal of each of the plurality of circuit blocks via the switching circuit and selectively couplable to the control terminal of each transistor of the plurality of transistors via the switching circuit.
15. The electronic circuit of claim 14 wherein:
each bias circuit of the plurality of bias circuits includes a sense line and a control line;
for each bias circuit of the plurality of bias circuits, the switching circuit selectively couples the sense line of the each bias circuit of the plurality of bias circuits to the first power terminal of a circuit block of the plurality of circuit blocks and the control line of the each bias circuit to the control terminal of the transistor associated with the circuit block; and
the first power terminal of each circuit module of the plurality of circuit modules is selectively couplable to each bias circuit of the plurality of bias circuits.
16. The electronic circuit of claim 14 wherein each bias circuit is concurrently couplable to the first power terminal of more than one circuit block of the plurality of circuit blocks via the switching circuit.
17. The electronic circuit of claim 14 further comprising:
a controller, the controller controlling the switching circuit for selectively coupling a bias circuit of the plurality of bias circuits to the first power terminal of a circuit module of the plurality of circuit modules for reducing the leakage current of the circuit module, wherein the controller selects which bias circuit of the plurality of bias circuits to selectively couple to the first power terminal of the circuit module based on a measured leakage current value for the circuit module.
18. A method for controlling leakage current in a circuit module, the method comprising:
measuring a leakage current in a circuit module; and
selecting a bias circuit of a plurality of bias circuits and coupling the selected bias circuit to the circuit module and controlling the conductivity of a transistor coupled to the circuit module with the bias circuit to control the leakage current of the circuit module, wherein the selected bias circuit is selected from the plurality of bias circuits based upon the measured leakage current.
19. The method of claim 18 , wherein the selected bias circuit is further selected based on a measured data retention voltage value of the circuit module.
20. The method of claim 18 , wherein each bias circuit includes a transistor associated with the bias circuit from a plurality of transistors, wherein the coupling the selected bias circuit to the control module includes coupling the associated transistor to the circuit module, wherein the controlling the conductivity of a transistor coupled to the circuit module with the bias circuit to control the leakage current of the circuit module includes controlling the conductivity of the associated transistor coupled to the circuit module with the selected bias circuit to control the leakage current of the circuit module.
21. The method of claim 18 , further comprising:
detecting a change in temperature; and
in response to the detected the change in temperature, selecting a second bias circuit of the plurality of bias circuits, decoupling the selected bias circuit from the circuit module, coupling the second selected bias circuit to the circuit module, and controlling the conductivity of a transistor coupled to the circuit module with the second selected bias circuit to control the leakage current of the circuit module, wherein the second selected bias circuit provides for a different data retention margin than the selected bias circuit.
22. The method of claim 18 further comprising:
storing a leakage current threshold value, a data retention threshold value, and a bias circuit default configuration value corresponding to the circuit module in a first register;
storing the measured leakage current, a measured data retention voltage, a plurality of bias circuit share indicator values, and a plurality of bias circuit value indicators in a second register;
implementing a bias circuit configuration policy of the circuit module based on one or more of the values stored in the first and second registers.
23. The method of claim 22 further comprising:
increasing the bias circuit share indicator value when the measured leakage current is above the leakage current threshold of the circuit module;
using the default bias circuit share indicator value when the measured leakage current is below the leakage current threshold of the circuit module;
using a lower bias voltage value of the bias circuit when the measured data retention voltage is above the data retention voltage threshold of the circuit module; and
using the default bias voltage value of the bias circuit when the measured data retention voltage is below the data retention voltage threshold of the circuit module.