Half-bridge circuits employing normally on switches and methods of preventing unintended current flow therein
View Patent ↗A method for rendering a half-bridge circuit containing normally on switches such as junction field effect transistors (JFETs) inherently safe from uncontrolled current flow is described. The switches can be made from silicon carbide or from silicon. The methods described herein allow for the use of better performing normally on switches in place of normally off switches in integrated power modules thereby improving the efficiency, size, weight, and cost of the integrated power modules. As described herein, a power supply can be added to the gate driver circuitry. The power supply can be self starting and self oscillating while being capable of deriving all of its source energy from the terminals supplying electrical potential to the normally on switch through the gate driver. The terminal characteristics of the normally on switch can then be coordinated to the input-to-output characteristics of the power supply.
1. A circuit comprising:
a first normally-on switch having a source, a drain and a gate, the source of the first normally-on switch electrically connected to a load and the drain of the first normally-on switch electrically connected to a supply voltage;
a second normally-on switch having a source, a drain, and a gate, the source of the second normally-on switch electrically connected to a common voltage and the drain of the second normally-on switch electrically connected to the load;
a first gate driver electrically connected between the gate and the source of the first normally-on switch;
a second gate driver electrically connected between the gate and the source of the second normally-on switch; and
an oscillating power supply electrically connected across the voltage source and the common voltage, wherein the oscillating power supply is configured to power the first and second gate drivers such that, for a given voltage applied to the input of the oscillating power supply, the oscillating power supply generates a first output voltage which is supplied to the gate of the first normally-on switch by the first gate driver and a second output voltage which is supplied to the gate of the second normally-on switch by the second gate driver;
wherein the first normally-on switch and the second normally-on switch are JFETs
wherein the oscillating power supply is a self-oscillating power supply and/or wherein the oscillating power supply is isolated.
2. The circuit of claim 1 , wherein the input-output characteristics of the oscillating power supply are coordinated with the characteristics of the first and second normally-on switches such that the first and second normally-on switches are in active current limiting mode over at least 50 percent of a voltage range of 0 to 600 V applied to the oscillating power supply.
3. The circuit of claim 1 , wherein the input-output characteristics of the oscillating power supply are coordinated with the characteristics of the first and second normally-on switches such that the first and second normally-on switches do not overheat when in passive current limiting mode.
4. The circuit of claim 1 , wherein the first gate driver and the second gate driver each comprise a totem pole driver.
5. The circuit of claim 1 , wherein the first normally-on switch and the second normally-on switch are each SiC JFETs.
6. An electrical device comprising three circuits as set forth in claim 1 arranged in parallel, wherein the device is a three-phase motor drive.