IP Library Granted Patent US 8,572,423
Granted Patent B1
US 8,572,423 · App. 13/021,754 · Granted Oct 29, 2013

Reducing peak current in memory systems

Inventors: Ori Isachar (Tel Aviv, IL); Julian Vlaiko (Kfar Saba, IL); Gil Semo (Tel Aviv, IL); Atai Levy (Ra'anana, IL)
Assignee: Apple Inc.
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Quick Facts
Patent No.
US 8,572,423
App. No.
13/021,754
Granted
Oct 29, 2013
Kind
B1
Abstract

A memory device includes a plurality of memory cells, a token input interface, a token output interface and control circuitry. The control circuitry is configured to accept a storage command, to condition execution of at least a part of the storage command on a presence of a token pulse on the token input interface, to execute the storage command, including the conditioned part, in the memory cells upon reception of the token pulse on the token input interface, and to reproduce the token pulse on the token output interface upon completion of the execution.

Claims (22)

1. A memory device, comprising:

a plurality of memory cells;

a token input interface;

a token output interface; and

control circuitry coupled between the token input interface and the token output interface, wherein the control circuitry is configured to conditionally execute a received storage command dependent on a presence of a token pulse on the token input interface, wherein the token pulse enables execution of at least some storage commands, wherein in response to the presence of the token pulse the control circuitry is configured to execute the storage command in the memory cells, and to reproduce the token pulse on the token output interface upon completion of the execution.

2. The memory device according to claim 1 , wherein the control circuitry is configured to conditionally execute on the presence of the token pulse only when the execution is expected to exceed a current consumption threshold.

3. The memory device according to claim 2 , wherein the control circuitry is configured to reproduce the token pulse on the token output interface immediately following the reception of the token pulse on the token input interface when there is no storage command to be executed by the memory device that is expected to exceed the current consumption threshold.

4. The memory device according to claim 2 , wherein the execution of the storage command involves carrying out a sequence of operations by the control circuitry, and wherein the control circuitry is configured to delay one or more of the operations in the sequence, which are expected to exceed the current consumption threshold, until detecting the token pulse on the token input interface.

5. The memory device according to claim 2 , wherein the control circuitry is configured to receive multiple types of token pulses corresponding to multiple respective current consumption thresholds, and to condition the execution on the presence of a given token pulse of a given type only when the execution is expected to exceed the respective current consumption threshold associated with the given type.

6. The memory device according to claim 1 , wherein the control circuitry is configured to receive an additional token pulse while executing the conditioned part of the storage command, and to reproduce the additional token pulse on the token output interface.

7. The memory device according to claim 1 , wherein the execution of the storage command involves carrying out a sequence of operations by the control circuitry, and wherein the control circuitry is configured to condition two or more of the operations in the sequence on the presence of two or more respective token pulses.

8. A method, comprising:

accepting a storage command in a memory device that includes a plurality of memory cells;

conditionally executing the received storage command dependent on a presence of a token pulse on a token input interface of the memory device, wherein the token pulse enables execution of at least some storage commands;

executing the storage command in response to the presence of the token pulse on the token input interface; and

reproducing the token pulse on a token output interface of the memory device upon completion of the execution.

9. The method according to claim 8 , wherein conditionally executing comprises causing the execution to depend on the presence of the token pulse only when the execution is expected to exceed a current consumption threshold.

10. The method according to claim 9 , wherein reproducing the token pulse comprises outputting the token pulse on the token output interface immediately following the reception of the token pulse on the token input interface when there is no storage command to be executed by the memory device that is expected to exceed the current consumption threshold.

11. The method according to claim 9 , wherein executing the storage command comprises carrying out a sequence of operations in the memory device, and wherein conditioning the execution comprises delaying one or more of the operations in the sequence, which are expected to exceed the current consumption threshold, until detecting the token pulse on the token input interface.

12. The method according to claim 9 , wherein conditioning the execution comprises receiving multiple types of token pulses corresponding to multiple respective current consumption thresholds, and conditioning the execution on the presence of a given token pulse of a given type only when the execution is expected to exceed the respective current consumption threshold associated with the given type.

13. The method according to claim 8 , and comprising receiving an additional token pulse while executing the conditioned part of the storage command, and reproducing the additional token pulse on the token output interface.

14. The method according to claim 9 , wherein executing the storage command comprises carrying out a sequence of operations in the memory device, and wherein conditioning the execution comprises conditioning two or more of the operations in the sequence on the presence of two or more respective token pulses.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2012
From: ANOBIT TECHNOLOGIES LTD.
To: APPLE INC.
Reel/Frame 028399/0733 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2011
From: ISACHAR, ORI; VLAIKO, JULIAN; SEMO, GIL; LEVY, ATAI
To: ANOBIT TECHNOLOGIES LTD.
Reel/Frame 025749/0620 →
Continuity (1)
Provisional Application 61357114 · Jun 22, 2010