IP Library Granted Patent US 8,283,630
Granted Patent B2
US 8,283,630 · App. 13/024,594 · Granted Oct 9, 2012

Method and apparatus for measuring dimension of circuit pattern formed on substrate by using scanning electron microscope

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,283,630
App. No.
13/024,594
Granted
Oct 9, 2012
Kind
B2
Abstract

In the dimension measurement of a circuit pattern using a scanning electron microscope (SEM), in order to make it possible to automatically image desired evaluation points (EPs) on a sample, and automatically measure the circuit pattern formed at the evaluation points, according to the present invention, in the dimension measurement of a circuit pattern using a scanning electron microscope (SEM), it is arranged that coordinate data of the EP and design data of the circuit pattern including the EP are used as an input, creation of a dimension measurement cursor for measuring the pattern existing in the EP and selection or setting of the dimension measurement method are automatically performed based on the EP coordinate data and the design data to automatically create a recipe, and automatic imaging/measurement is performed using the recipe.

Claims (14)

1. A method of measuring a dimension of a circuit pattern, which is formed on a substrate, using a scanning electron microscope (SEM), comprising the steps of:

(a) inputting a center coordinate of an SEM image area and design information of a circuit pattern;

(b) setting a measurement object area including an edge of the circuit pattern having a dimension to be measured, using the center coordinate of the SEM imaging area and the design information input, and setting an imaging area and imaging condition for imaging an area including the measurement object area with the scanning electron microscope;

(c) setting an imaging sequence for imaging the imaging area with the scanning electron microscope for measuring the dimension of the circuit pattern;

(d) imaging the circuit pattern formed on the substrate with the scanning electron microscope based on the imaging condition and the imaging sequence; and

(e) processing the image obtained by imaging to measure the dimension of the circuit pattern,

wherein, step (b) includes the steps of setting, as the measurement object area, an area including the edge of the circuit pattern in the vicinity of the position at which the dimension of the circuit pattern is measured, and setting in accordance with a direction of the edge of the circuit pattern included in the area, a direction of continuous scanning of an electron beam scanned in the scanning electron microscope.

2. An apparatus adapted to measure a dimension of a circuit pattern formed on a substrate using a scanning electron microscope, comprising:

input means for inputting a center coordinate of an SEM image area and design information of a circuit pattern;

imaging condition setting means including a measurement object area setting section adapted to set a measurement object area including an edge of the circuit pattern having a dimension to be measured, using the center coordinate of the SEM imaging area and the design information input, and an area/condition setting section adapted to set an imaging area and imaging condition for imaging an area including the measurement object area with the scanning electron microscope;

imaging sequence setting means for setting an imaging sequence for imaging the imaging area, which is set by the imaging condition setting means for measuring the dimension of the circuit pattern, with the scanning electron microscope;

scanning electron microscope means for imaging the circuit pattern formed on the substrate based on the imaging condition set by the imaging condition setting means and the imaging sequence set by the imaging sequence setting means; and

image processing means for processing the image obtained by imaging with the scanning electron microscope means to measure the dimension of the circuit pattern,

wherein, the measurement object area setting section of the imaging condition setting means sets, as an area including a position at which the dimension of the circuit pattern is measured, an area including the edge of the circuit pattern in the vicinity of the position at which the dimension of the circuit pattern is measured, and the imaging condition means further includes a scanning direction setting section adapted to set a direction of continuous scanning of an electron beam scanned in the scanning electron microscope in accordance with a direction of the edge of the circuit pattern included in the area set by the measurement object area setting section.

Assignments (1)
CHANGE OF NAME AND ADDRESS Recorded Mar 30, 2020
From: HITACHI HIGH-TECHNOLOGIES CORPORATION
To: HITACHI HIGH-TECH CORPORATION
Reel/Frame 052259/0227 →