Method and apparatus for restoring data in a non-volatile memory
View Patent ↗A method and apparatus for selectively restoring data in a non-volatile memory array based on failure type. Weakened data and erroneous data are identified by performing two readings of a specific memory section. Alternatively, an error correction code is used after a first reading of data to identify erroneous data. The manner in which data is restored will depend on whether the data changed because of an erase failure or a program failure. If only a program failure occurred then the data will be reprogrammed without an intervening erase step. If the data experienced an erase failure, then the data will be erased prior to being programmed with correct data.
1. A method for restoring data in a non-volatile memory having a combination of programmed cells and erased cells, the method comprising:
selecting a row of cells in the memory;
performing a first read of data from the row at a first frequency;
performing a second read of data from the same row at a second frequency that is slower than the first frequency;
comparing the data read in the first read with the data read in the second read to determine if a data mismatch has occurred for one or more cells of the row; and
correcting data in the row in a first manner if a data mismatch occurred for any erased cell of the row, and correcting the data in the row in a second manner if a data mismatch occurred for one or more programmed cells of the row but not for any erased cell of the row.
2. The method of claim 1 , wherein if said data mismatch occurred for any erased cell of the row, then the row is erased prior to programming the row with correct data.
3. The method of claim 1 , wherein if said data mismatch occurred for a programmed cell of the row, then the row is programmed with correct data, without performing any intervening erase operation.
4. The method of claim 3 , wherein the programming of the row is performed for only bits that are defective.
5. The method of claim 1 , wherein the second read is performed prior to erasing the row containing incorrect data.
6. The method of claim 1 , wherein the data in the row is refreshed during an idle cycle of the memory.
7. The method of claim 1 , wherein the data in the row is refreshed before the memory enters a shutdown mode.
8. The method of claim 1 , wherein the data in the row is refreshed during a power-up period.
9. A system for restoring data in a non-volatile memory having a combination of programmed cells and erased cells, the system comprising:
a decoder configured to select a row of cells in the memory;
a refresh controller configured to perform a first read of data from the row at a first frequency, and to perform a second read of data from the same row at a second frequency that is slower than the first frequency; and
a comparator configured to compare the data read in the first read with the data read in the second read to determine if a data mismatch has occurred for one or more cells of the row, the refresh controller further configured to correct data in the row in a first manner if a data mismatch occurred for any erased cell of the row and to correct data in the row in a second manner if a data mismatch occurred for one or more programmed cells of the row but not for any erased cell of the row.
10. The system of claim 9 , wherein if said data mismatch occurred for any erased cell of the row, then the refresh controller is further configured to erase the row prior to programming the row with correct data.
11. The system of claim 9 , wherein if said data mismatch occurred for a programmed cell of the row, then the refresh controller is further configured to program the row with correct data, without performing any intervening erase operation.
12. The system of claim 11 , wherein the refresh controller is further configured to program the row for only bits that are defective.
13. The system of claim 9 , wherein the refresh controller is further configured to perform the second read prior to erasing the row containing incorrect data.
14. The system of claim 9 , wherein the refresh controller is further configured to refresh the data in the row during an idle cycle of the memory.
15. The system of claim 9 , wherein the refresh controller is further configured to refresh the data in the row before the memory enters a shutdown mode.
16. The system of claim 9 , wherein the refresh controller is further configured to refresh the data in the row during a power-up period.
17. A system for restoring data in a non-volatile memory having a combination of programmed cells and erased cells, the system comprising:
a means for selecting a row of cells in the memory;
a means for performing a first read of data from the row at a first frequency;
a means for performing a second read of data from the same row at a second frequency that is slower than the first frequency;
a means for comparing the data read in the first read with the data read in the second read to determine if a data mismatch has occurred for one or more cells of the row; and
a means for correcting data in the row in a first manner if a data mismatch occurred for any erased cell of the row and to correct data in the row in a second manner if a data mismatch occurred for one or more programmed cells of the row but not for any erased cell of the row.
18. The system of claim 17 , further comprising means for erasing the row prior to programming the row with the correct data is response to determining the data mismatch occurred for any erased cell of the row.
19. The system of claim 17 , further comprising means for programming the row with correct data without performing any intervening erase operation on the row in response to determining the data mismatch occurred for a programmed cell of the row.
20. The system of claim 19 , wherein the means for programming the row with correct data without performing any intervening erase operation on the row is further configured to program the row for only bits that are defective.