IP Library › Granted Patent US 8,958,185
Granted Patent B2
US 8,958,185 · App. 13/029,240 · Granted Feb 17, 2015

ESD block isolation by RF choke

Inventors: Ming Hsien Tsai (Sindian, TW); Jun-De Jin (Hsinchu, TW); Hsieh-Hung Hsieh (Taipei, TW); Tzu-Jin Yeh (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L27/0288H02H9/046
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Quick Facts
Patent No.
US 8,958,185
App. No.
13/029,240
Granted
Feb 17, 2015
Kind
B2
Abstract

A circuit includes a first node configured to receive a radio frequency (“RF”) signal, a first electrostatic discharge (ESD) protection circuit coupled to a first voltage supply rail for an RF circuit and to a second node, and a second ESD protection circuit coupled to the second node and to a second voltage supply node for the RF circuit. An RF choke circuit is coupled to the second node and to a third node disposed between the first node and the RF circuit.

Claims (31)

1. A circuit, comprising:

a first node configured to receive a radio frequency (“RF”) signal;

a first electrostatic discharge (ESD) protection circuit coupled to a first voltage supply rail for an RF circuit and to a second node;

a second ESD protection circuit coupled to the second node and to a second voltage supply rail for the RF circuit; and

an RF choke circuit disposed in parallel with the first node and coupled to the second node and to a third node disposed between the first node and the RF circuit,

wherein the RF choke circuit has substantially no capacitance and includes an inductor.

2. The circuit of claim 1 , wherein the first ESD protection circuit includes a first diode having an anode coupled to the first voltage supply rail and a cathode coupled to the second node, the second ESD protection circuit includes a second diode having a cathode coupled to the second voltage supply rail and an anode coupled to the second node.

3. The circuit of claim 1 , wherein the RF choke circuit includes a first resistor coupled in parallel with a first inductor.

4. The circuit of claim 3 , further comprising a second resistor disposed in series with the first resistor and the first inductor that are disposed in parallel with each other.

5. The circuit of claim 4 , further comprising a second inductor disposed in series with the first resistor and the first inductor that are disposed in parallel with each other.

6. The circuit of claim 1 , further comprising a third ESD circuit coupled to the first and second supply rails in parallel to the RF circuit.

7. The circuit of claim 1 , further comprising a third ESD protection circuit disposed in parallel with the RF circuit and coupled to the first and second voltage supply rails.

8. A method, comprising:

receiving a radio frequency signal at a first node coupled to a first circuit and to an RF choke circuit, the RF choke circuit coupled to a second node disposed between a first ESD protection circuit and a second ESD protection circuit;

providing impedance isolation between the first circuit and the second node disposed between the first and second ESD protection circuits in the absence of an electrostatic discharge event; and

conducting current through the RF choke circuit from the first node to the second node discharge current through at least one of the first and second ESD protection circuits during an electrostatic discharge event,

wherein the RF choke circuit includes a first resistor disposed in parallel with a first inductor.

9. The method of claim 8 , wherein the RF choke circuit includes a first resistor disposed in parallel with a first inductor.

10. The method of claim 9 , wherein the RF choke circuit includes a second resistor disposed in series with the first resistor and the first inductor that are disposed in parallel with each other.

11. The method of claim 9 , wherein the RF choke circuit includes a second inductor disposed in series with the first resistor and the first inductor that are disposed in parallel with each other.

12. A circuit for protecting a radio frequency (“RF”) circuit from electrostatic discharge (“ESD”), the circuit comprising:

a diode string including

a first diode having an anode coupled to a first voltage supply line for the RF circuit and a cathode coupled to a first node, and

a second diode having a cathode coupled to the first node and an anode coupled to a second voltage supply line for the RF circuit; and

an RF choke circuit coupled to the first node and to a second node disposed between the RF circuit and a third node through which the RF circuit receives an RF signal, the RF choke circuit configured to provide impedance isolation between the diode string and the RF circuit in the absence of an ESD event and to conduct current from the third node to the first node during an ESD event,

wherein the RF choke circuit has substantially no capacitance and includes an inductor.

13. The circuit of claim 12 , wherein the RF choke circuit includes an inductor and a resistor.

14. The circuit of claim 13 , wherein the inductor and resistor are disposed in series with each other.

15. The circuit of claim 13 , wherein the inductor and resistor are disposed in parallel with each other.

16. The circuit of claim 13 , wherein the RF choke circuit includes a second resistor coupled in series with a parallel combination of the resistor and inductor.

17. The circuit of claim 13 , wherein the RF choke circuit includes a second inductor coupled in series with a parallel combination of the resistor and inductor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2011
From: TSAI, MING HSIEN; JIN, JUN-DE; HSIEH, HSIEH-HUNG; YEH, TZU-JIN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 025824/0739 →
Continuity (1)
Related Publication 20120212865A1 · Aug 23, 2012