Thermal enhanced package using embedded substrate
View Patent ↗An integrated circuit (IC) device is provided. The IC device includes an IC die having opposing first and second surfaces, a carrier coupled to the first surface of the IC die, a laminate coupled to the carrier and the second surface of the IC die, and a trace located on a surface of the laminate and electrically coupled to a bond pad located on the second surface of the IC die. The trace is configured to couple the bond pad to a circuit board.
1. An integrated circuit (IC) device, comprising:
an IC die having opposing first and second surfaces;
a carrier coupled to the first surface of the IC die;
a laminate having opposing first and second surfaces, the first surface of the laminate directly contacting the carrier, wherein a third surface of the laminate directly contacts the second surface of the IC die; and
a trace located on the second surface of the laminate and electrically coupled to a bond pad located on the second surface of the IC die, wherein the trace is configured to couple the bond pad to a circuit board.
2. The IC device of claim 1 , farther comprising:
a connection element coupled to the trace and configured to be coupled to the circuit board.
3. The IC device of claim 2 , Wherein the connection element comprises at least one of a solder ball or a solder paste.
4. The IC device of claim 1 , further comprising:
a solder mask formed on the second surface of the laminate.
5. The IC device of claim 4 , wherein the solder mask is configured to expose a portion of the trace.
6. The IC device of claim 4 , further comprising:
a second trace located on a surface of the solder mask, wherein the second trace is electrically coupled to a second bond pad located on the second surface of the IC die.
7. The IC device of claim 1 , wherein the carrier comprises a thermally conductive material.
8. The IC device of claim 1 , further comprising a via that couples the trace to the bond pad.
9. The IC device of claim 1 , wherein the laminate is substantially uniform in composition.
10. The IC device of claim 9 , wherein the trace is in direct contact with the second surface of the laminate.
11. The IC device of claim 1 , wherein the laminate comprises a fiber material.
12. The IC device of claim 1 , wherein the laminate comprises a substrate core material.
13. The IC device of claim 1 , wherein the laminate comprises a prepreg material.
14. The IC device of claim 1 , further comprising:
a first solder mask formed on the second surface of the laminate; and
a second solder mask formed on the first solder mask.
15. The IC device of claim 14 , wherein the first solder mask is configured to expose a portion of the trace.
16. The IC device of claim 15 , further comprising:
a second trace formed on the first solder mask.
17. The IC device of claim 16 , wherein the trace is a first trace, further comprising:
a via that electrically couples the first trace to the second trace.
18. The IC device of claim 16 , wherein the first trace is electrically coupled to a first bond pad of the IC die and the second trace is electrically coupled to a second bond pad of the IC die.
19. The IC device of claim 17 , wherein the second solder mask is configured to expose at least a portion of the second trace.
20. The IC device of claim 1 , further comprising an adhesive that couples the carrier to the IC die.