Integrated circuit using method for setting level of reference voltage
An integrated circuit includes a reference voltage level setting circuit and a reference voltage generation circuit. The reference voltage level setting circuit is configured to set a level of an input reference voltage to a preset level in a power-up period or a self-refresh mode. The reference voltage generation circuit is configured to select one of a plurality of reference voltages and output the selected reference voltage as the input reference voltage when the power-up period is ended and an operation mode is not in the self-refresh mode.
1. An integrated circuit comprising:
a reference voltage level setting circuit configured to set a level of an input reference voltage to a middle level between a power supply voltage and a ground voltage in a power-up period or a self-refresh mode; and
a reference voltage generation circuit configured to select one of a plurality of reference voltages and output the selected reference voltage as the input reference voltage when the power-up period is ended and an operation mode is not in the self-refresh mode,
wherein the reference voltage level setting circuit includes a pull-up signal generation unit configured to receive a power-up signal and a self-refresh signal to generate a pull-up signal enabled in the power-up period or the self-refresh mode and a transfer element configured to transfer a signal of a middle node as the input reference voltage in response to the pull-up signal and a pull-down signal.
2. The integrated circuit of claim 1 , wherein the reference voltage level setting circuit further comprises:
a pull-up driving unit configured to pull-up drive the middle node in response to the pull-up signal; and
a pull-down driving unit configured to pull-down drive the middle node in response to the pull-down signal which is generated by buffering the pull-up signal.
3. The integrated circuit of claim 1 , wherein the reference voltage generation circuit comprises:
an enable signal generation unit configured to receive a power-up signal and a self-refresh signal and generate an enable signal;
a voltage division unit configured to divide the power supply voltage in response to the enable signal and generate the plurality of reference voltages;
a decoder configured to decode a selection signal and generate a decoding signal; and
a multiplexer configured to select one of the plurality of reference voltages as the input reference voltage in response to the decoding signal, wherein the multiplexer outputs the selected reference voltage as the input reference voltage when the power-up period is ended and an operation mode is not in the self-refresh mode.
4. The integrated circuit of claim 1 , further comprising a data input circuit configured to buffer data in response to the input reference voltage and output the buffered data as input data.
5. The integrated circuit of claim 4 , wherein the data input circuit further comprises a plurality of comparators, the plurality of comparators comprising at least:
a first comparator configured to compare the input reference voltage with a first data and generate a first input data; and
a second comparator configured to compare the input reference voltage with a second data and generate a second input data.