IP Library Granted Patent US 8,238,867
Granted Patent B1
US 8,238,867 · App. 13/036,892 · Granted Aug 7, 2012

Low noise amplifier (LNA) suitable for use in different transmission environments and receiver using such an LNA

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Quick Facts
Patent No.
US 8,238,867
App. No.
13/036,892
Granted
Aug 7, 2012
Kind
B1
Abstract

A low-noise amplifier includes first and second transconductance paths and first and second variable capacitive dividers. The first transconductance path has a first terminal for receiving a first input signal, a control terminal, and a second terminal for providing a first output signal. The second transconductance path has a first terminal for receiving a second input signal, a control terminal, and a second terminal for providing a second output signal. The first variable capacitive divider has a first terminal for receiving the first input signal, a second terminal coupled to a reference voltage terminal, and an intermediate terminal coupled to the control terminal of the second transconductance path. The second variable capacitive divider has a first terminal for receiving the second input signal, a second terminal coupled to the reference voltage terminal, and an intermediate terminal coupled to the control terminal of the first transconductance path.

Claims (61)

1. A low-noise amplifier comprising:

a first transconductance path having a first terminal for receiving a first input signal, a control terminal, and a second terminal for providing a first output signal;

a second transconductance path having a first terminal for receiving a second input signal, a control terminal, and a second terminal for providing a second output signal;

a first variable capacitive divider having a first terminal for receiving said first input signal, a second terminal coupled to a reference voltage terminal, and an intermediate terminal coupled to said control terminal of said second transconductance path; and

a second variable capacitive divider having a first terminal for receiving said second input signal, a second terminal coupled to said reference voltage terminal, and an intermediate terminal coupled to said control terminal of said first transconductance path.

2. The low-noise amplifier of claim 1 , wherein each of said first and second variable capacitive dividers further have a control terminal for receiving a control signal, said control signal determining a fraction of said first and second input signals provided to respective intermediate terminals.

3. The low-noise amplifier of claim 2 , wherein said first capacitive divider comprises:

a first capacitor having a first terminal for receiving said first input signal, and a second terminal forming said intermediate terminal; and

a variable capacitor having a first terminal coupled to said second terminal of said first capacitor, a control terminal for receiving said control signal, and a second terminal coupled to said reference voltage terminal.

4. The low-noise amplifier of claim 3 , wherein said variable capacitor comprises:

a second capacitor having a first terminal coupled to said second terminal of said first capacitor, and a second terminal; and

a switch having a first terminal coupled to said second terminal of said second capacitor, a control terminal for receiving said control signal, and a second terminal coupled to said reference voltage terminal.

5. The low-noise amplifier of claim 3 , wherein said control signal comprises a multiple-bit digital signal, and said variable capacitor comprises a plurality of legs, each leg comprising:

a second capacitor having a first terminal coupled to said second terminal of said first capacitor, and a second terminal; and

a switch having a first terminal coupled to said second terminal of said second capacitor, a control terminal for receiving a corresponding bit of said multiple-hit digital signal, and a second terminal coupled to said reference voltage terminal.

6. The low-noise amplifier of claim 3 , further comprising:

a control circuit for providing said control signal to set said variable capacitor to a first value in response to a mode signal indicating a low noise figure (NF) mode, and to a second value lower than said first value in response to said mode signal indicating a low reflection loss (RL) mode.

7. The low-noise amplifier of claim 6 , further comprising:

a register coupled to said control circuit having a field for storing said mode signal.

8. The low-noise amplifier of claim 1 , wherein said first transconductance path comprises:

a resistor having a first terminal for receiving said first input signal, and a second terminal; and

a transistor having a first current electrode coupled to said second terminal of said resistor, a control electrode forming said control terminal of said first transconductance path, and a second current electrode forming said second terminal of said first transconductance path.

9. The low-noise amplifier of claim 8 , wherein said transistor comprises a metal-oxide-semiconductor (MOS) transistor.

10. An integrated circuit comprising:

a first integrated circuit terminal for receiving a first input signal;

a second integrated circuit terminal for receiving a second input signal, wherein said first and second input signals form a differential input signal pair; and

a low noise amplifier having a first input terminal coupled to said first integrated circuit terminal, a second input terminal coupled to said second integrated circuit terminal, and an output terminal,

said low noise amplifier comprising:

a first transconductance path having a first terminal for receiving a first input signal, a control terminal, and a second terminal for providing a first output signal;

a second transconductance path having a first terminal for receiving a second input signal, a control terminal, and a second terminal for providing a second output signal;

a first variable capacitive divider having a first terminal for receiving said first input signal, a second terminal coupled to a reference voltage terminal, and an intermediate terminal coupled to said control terminal of said second transconductance path; and

a second variable capacitive divider having a first terminal for receiving said second input signal, a second terminal coupled to said reference voltage terminal, and an intermediate terminal coupled to said control terminal of said first transconductance path.

11. The integrated circuit of claim 10 , wherein each of said first and second variable capacitive dividers further have a control terminal for receiving a control signal, said control signal determining a fraction of said first and second input signals provided to respective intermediate terminals.

12. The integrated circuit of claim 11 , wherein said first capacitive divider comprises:

a first capacitor having a first terminal for receiving said first input signal, and a second terminal forming said intermediate terminal; and

a variable capacitor having a first terminal coupled to said second terminal of said first capacitor, a control terminal for receiving said control signal, and a second terminal coupled to said reference voltage terminal.

13. The integrated circuit of claim 11 , further comprising:

a third integrated circuit terminal for receiving a data signal, wherein said integrated circuit forms said control signal in response to said data signal.

14. The integrated circuit of claim 13 , further comprising:

a register having a field for storing said data signal.

15. The integrated circuit of claim 10 , wherein said first transconductance path comprises:

a resistor having a first terminal for receiving said first input signal, and a second terminal; and

a transistor having a first current electrode coupled to said second terminal of said resistor, a control electrode forming said control terminal of said first transconductance path, and a second current electrode forming said second terminal of said first transconductance path.

16. The integrated circuit of claim 15 , wherein said transistor comprises a metal-oxide-semiconductor (MOS) transistor.

17. A radio frequency receiver comprising:

a low noise amplifier comprising:

a first transconductance path having a first terminal for receiving a first input signal, a control terminal, and a second terminal for providing a first output signal;

a second transconductance path having a first terminal for receiving a second input signal, a control terminal, and a second terminal for providing a second output signal;

a first variable capacitive divider having a first terminal for receiving said first input signal, a second terminal coupled to a reference voltage terminal, and an intermediate terminal coupled to said control terminal of said second transconductance path; and

a second variable capacitive divider having a first terminal for receiving said second input signal, a second terminal coupled to said reference voltage terminal, and an intermediate terminal coupled to said control terminal of said first transconductance path

a bandpass filter coupled to said second terminals of said first and second transconductance paths, for filtering said first and second output signals in response to a first tuning signal;

a local oscillator having an output for providing a local oscillator signal at a frequency determined by a second tuning signal;

a mixer having an input for receiving said local oscillator signal, and outputs for providing in-phase and quadrature signals at another frequency; and

processing circuitry for processing said in-phase signal and said quadrature signal to provide a received output signal.

18. The radio frequency receiver of claim 10 , wherein each of said first and second variable capacitive dividers further have a control terminal for receiving a control signal, said control signal determining a fraction of said first and second input signals provided to respective intermediate terminals.

19. The integrated circuit of claim 18 , wherein said first capacitive divider comprises:

a first capacitor having a first terminal for receiving said first input signal, and a second terminal forming said intermediate terminal; and

a variable capacitor having a first terminal coupled to said second terminal of said first capacitor, a control terminal for receiving said control signal, and a second terminal coupled to said reference voltage terminal.

20. The integrated circuit of claim 18 , further comprising:

a register having a field for storing a mode signal; and

a control circuit coupled to said register for providing said control signal to set said variable capacitor to a first value in response to said mode signal indicating a low noise figure (NF) mode, and to a second value lower than said first value in response to said mode signal indicating a low reflection loss (RL) mode.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2021
From: SILICON LABORATORIES INC.
To: SKYWORKS SOLUTIONS, INC.
Reel/Frame 057033/0579 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2011
From: KHOINI-POORFARD, RAMIN
To: SILICON LABORATORIES, INC.
Reel/Frame 025875/0356 →