IP Library › Granted Patent US 8,481,430
Granted Patent B2
US 8,481,430 · App. 13/037,474 · Granted Jul 9, 2013

Method of manufacturing semiconductor device

Inventor: Ryou Sato (Yamagata, JP)
Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,481,430
App. No.
13/037,474
Granted
Jul 9, 2013
Kind
B2
Abstract

The present invention provides a method of manufacturing a semiconductor device. The method includes stacking a SiO 2 film, a N-containing stopper film, and a resist pattern in this order on a semiconductor substrate, performing etching on the stopper film and the SiO 2 film with a F-containing etching gas, with the resist pattern serving as a mask to form an opening, and performing ashing on the resist pattern to remove the resist pattern, using a gas containing an oxygen gas and an inert gas under the condition that the ratio of the oxygen radical to the inert-gas radical becomes equal to or lower than 5.

Claims (15)

1. A method of manufacturing a semiconductor device, comprising:

stacking an insulating film, a N-containing stopper film, and a resist pattern in this order on a semiconductor substrate;

etching said stopper film and said insulating film with a F-containing etching gas using said resist pattern as a mask, to form an opening; and

performing ashing to remove said resist pattern by using a gas containing an oxygen gas and an inert gas under a condition that a ratio of an oxygen radical density to an inert-gas radical density is equal to or lower than 5, after said etching.

2. The method as claimed in claim 1 , further comprising:

forming a metal film on said semiconductor substrate to fill said opening with a metal after said semiconductor device is left in atmosphere, said forming the metal film being performed after said performing ashing.

3. The method as claimed in claim 1 , wherein said inert gas includes at least one of an argon gas, a helium gas, a nitrogen gas, and a hydrogen gas.

4. The method as claimed in claim 3 , wherein said inert gas is an argon gas.

5. The method as claimed in claim 1 , wherein

said stacking includes further forming an antireflection film between said stopper film and said resist pattern,

said etching includes etching said antireflection film with said F-containing etching gas, and

said performing ashing includes performing ashing to remove said antireflection film, using said gas containing said oxygen gas and said inert gas under the condition that the ratio of the oxygen radical density to the inert-gas radical density is equal to or lower than 5 after said etching.

6. The method as claimed in claim 1 , wherein said stopper film is a SiCN film.

7. The method as claimed in claim 1 , wherein said etching gas is a C x F y gas.

8. The method as claimed in claim 1 , further comprising measuring said ratio of the oxygen radical density to the inert-gas radical density be means of optical emission analysis.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2011
From: SATOU, RYOU
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 026117/0071 →
Priority Claims (1)
JP 2010-044955 · Mar 2, 2010 · national
Continuity (1)
Related Publication 20110217844A1 · Sep 8, 2011