IP Library Granted Patent US 9,029,227
Granted Patent B2
US 9,029,227 · App. 13/038,081 · Granted May 12, 2015

P-channel flash with enhanced band-to-band tunneling hot electron injection

Inventors: Eng Huat Toh (Singapore, SG); Elgin Quek (Singapore, SG); Ying Keung Leung (Singapore, SG); Sanford Chu (Leonie Condotel, SG)
Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
H01L29/792H01L21/28282H01L29/513
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,029,227
App. No.
13/038,081
Granted
May 12, 2015
Kind
B2
Abstract

A p-channel flash memory is formed with a charge storage stack embedded in a hetero-junction layer in which a raised source/drain is formed. Embodiments include forming a dummy gate stack on a substrate, forming a layer on the substrate by selective epitaxial growth, on each side of the dummy gate stack, forming spacers on the layer, forming raised source/drains, removing the dummy gate stack, forming a cavity between the spacers, and forming a memory gate stack in the cavity. Different embodiments include forming the layer of a narrow bandgap material, a narrow bandgap layer under the spacers and a wide bandgap layer adjacent thereto, or a wide bandgap layer under the spacers, a narrow bandgap layer adjacent thereto, and a wide bandgap layer on the narrow bandgap layer.

Claims (47)

1. A method comprising:

forming a dummy gate stack on a substrate;

forming a first layer of a narrow bandgap material on the substrate by selective epitaxial growth, on each side of the dummy gate stack;

forming spacers on the first layer;

forming raised source/drains;

removing the dummy gate stack, subsequent to forming the raised source/drains, forming a cavity between the spacers; and

forming a memory gate stack in the cavity recess etching the first layer, leaving only the portion under the spacers; forming a second layer, by selective epitaxial growth on the substrate, adjacent the first layer and to substantially the same thickness as the first layer; and subsequently forming the raised source/drains by deep source/drain implantation in the second layer, wherein forming the second layer of a wide bandgap material.

2. The method according to claim 1 , comprising forming the raised source/drains by deep source/drain implantation in the first layer.

3. The method according to claim 1 , comprising forming the raised source/drains by in situ doping the first layer during selective epitaxial growth.

4. The method according to claim 1 , comprising:

recess etching the first layer, leaving only the portion under the spacers;

forming a second layer, by selective epitaxial growth on the substrate, adjacent the first layer and to substantially the same thickness as the first layer; and

forming the raised source/drains by in situ doping the layer during selective epitaxial growth of the second layer.

5. The method according to claim 1 , comprising:

recess etching the first layer, leaving only the portion under the spacers;

forming a second layer by selective epitaxial growth on the substrate, adjacent each side of the dummy gate stack, to a thickness less than the thickness of the first layer;

forming a third layer by selective epitaxial growth on the second layer, the second and third layers having a total thickness substantially equal to the thickness of the first layer; and

subsequently forming the raised source/drains by deep source/drain implantation in the third layer.

6. The method according to claim 1 , comprising:

recess etching the first layer, leaving only the portion under the spacers;

forming a second layer by selective epitaxial growth on the substrate, adjacent each side of the dummy gate stack, to a thickness less than the thickness of the first layer;

forming a third layer by selective epitaxial growth on the second layer, the second and third layers having a total thickness substantially equal to the thickness of the first layer; and

forming the raised source/drains by in situ doping the layer during selective epitaxial growth of the third layer.

7. A method comprising:

forming a dummy gate stack on a substrate;

forming a first layer of a narrow band gap material on the substrate by selective epitaxial growth, on each side of the dummy gate stack;

removing the dummy gate stack, forming a cavity;

forming a memory gate stack in the cavity to a height greater than the thickness of the first layer;

forming spacers, subsequent to forming the memory gate stack, on the first layer on each side of the memory gate stack; and

forming raised source/drains recess etching the first layer, leaving only the portion under the spacers; forming a second layer, by selective epitaxial growth on the substrate, adjacent the first layer and to substantially the same thickness as the first layer; and subsequently forming the raised source/drains by deep source/drain implantation in the second layer wherein forming the second layer of a wide band gap material.

8. The method according to claim 7 , comprising forming the raised source/drains by deep source/drain implantation in the first layer.

9. The method according to claim 7 , comprising forming the raised source/drains by in situ doping during selective epitaxial growth of the first layer.

10. The method according to claim 7 , comprising:

recess etching the first layer, leaving only the portion under the spacers;

forming a second layer, by selective epitaxial growth on the substrate, adjacent the first layer and to substantially the same thickness as the first layer; and

forming the raised source/drains by in situ doping during selective epitaxial growth of the second layer.

11. The method according to claim 7 , comprising:

recess etching the first layer, leaving only the portion under the spacers;

forming a second layer by selective epitaxial growth on the substrate and adjacent each side of the dummy gate structure, to a thickness less than the thickness of the first layer;

forming a third layer by selective epitaxial growth on the second layer, the second and third layers having a total thickness substantially equal to the thickness of the first layer; and

subsequently forming the raised source/drains by deep source/drain implantation in the third layer.

12. The method according to claim 11 , comprising forming the second layer of a wide band gap material.

13. The method according to claim 7 , comprising:

recess etching the first layer, leaving only the portion under the spacers;

forming a second layer by selective epitaxial growth on the substrate and adjacent each side of the dummy gate structure, to a thickness less than the thickness of the first layer;

forming a third layer by selective epitaxial growth on the second layer, the second and third layers having a total thickness substantially equal to the thickness of the first layer; and

forming the raised source/drains by in situ doping during selective epitaxial growth of the third layer.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Nov 19, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 054481/0673 →
SECURITY AGREEMENT Recorded Nov 27, 2018
From: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 047660/0203 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 1, 2011
From: TOH, ENG HUAT; QUEK, ELGIN; LEUNG, YING KEUNG; CHU, SANFORD
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 025882/0162 →
Continuity (1)
Related Publication 20120223318A1 · Sep 6, 2012