Semiconductor layer structure and method for fabricating a semiconductor layer structure
View Patent ↗Semiconductor layer structure and a method for producing a structure are provided, including a substrate made of semiconductor material, on which a layer made of a second semiconductor material is situated, furthermore a region ( 3 ) enriched with impurity atoms, which region is situated either in layer ( 2 ) or at a specific depth below the interface between layer ( 2 ) and substrate ( 1 ), additionally a layer ( 4 ) within the region ( 3 ) enriched with impurity atoms, which layer comprises cavities produced by ion implantation, furthermore at least one epitaxial layer ( 6 ) applied to layer ( 2 ) and also a defect region ( 5 ) comprising dislocations and stacking faults within the layer ( 4 ) comprising cavities, the at least one epitaxial layer ( 6 ) being largely crack-free, and a residual strain of the at least one epitaxial layer ( 6 ) being less than or equal to 1 GPa.
1. A method for fabricating a semiconductor layer structure, the method comprising the following steps:
a) providing a substrate made of a first semiconductor material that includes silicon;
b) applying a first layer to the substrate, the first layer made of a second semiconductor material that includes silicon carbide, the substrate and the layer defining a semiconductor layer structure, the step of applying the first layer to the substrate including steps of implanting carbon ions into the substrate to produce a buried silicon carbide layer and then removing material to uncover the first layer;
c) implanting light gas ions into the semiconductor layer structure to produce a cavity layer in the semiconductor layer structure, the cavity layer including a plurality of cavities, wherein the light gas ions are selected from a group consisting of hydrogen ions, noble gas ions, and a combination of hydrogen ions and noble gas ions;
d) implanting impurity atoms into the semiconductor layer structure with a dose of no more than about 5×10 17 /cm 2 to thermally stabilize the cavities, wherein the impurity atoms are of one or more atom types selected from a group consisting of oxygen, nitrogen, and carbon;
e) applying at least one epitaxial layer to the semiconductor layer structure.
2. The method of claim 1 , wherein the substrate is a wafer made of monocrystalline silicon.
3. The method of claim 1 , wherein the substrate is an SOI wafer.
4. The method of claim 1 , wherein the first layer is a layer structure including a region of high SiC precipitate density and a monocrystalline silicon carbide layer.
5. The method of claim 1 , wherein the at least one epitaxial layer includes semiconductor material having a substantially different coefficient of thermal expansion in comparison with the semiconductor material of the substrate.
6. The method of claim 5 , wherein the at least one epitaxial layer comprises a nitride compound semiconductor.
7. The method of claim 5 , wherein the at least one epitaxial layer is an epitaxial silicon layer.
8. The method as claimed in claim 1 , wherein the noble gas ions are selected from the group consisting of helium, neon and argon.
9. The method of claim 1 , wherein an energy for implanting the light gas ions is chosen such that the cavity layer is produced below an interface between the first layer and the substrate.
10. The method of claim 1 , wherein an energy for implanting the light gas ions is chosen such that the cavity layer is produced within the first layer.
11. The method as claimed in claim 1 , further including a step, prior to the step of using impurity atoms, of providing a thermal treatment of the semiconductor layer structure at a temperature of at least 600° C.
12. The method of claim 1 , wherein the step of implanting carbon ions and a step of thermal treatment of the semiconductor layer structure produce a buried monocrystalline layer and transition regions above and below the monocrystalline layer and further including a step of removing an upper substrate layer and the transition region above the monocrystalline layer to uncover the first layer.