Method and apparatus for placement and routing of partial reconfiguration modules

1. A method for designing a system on a target device, the method comprising:

assigning resources on the target device to static logic modules and partial reconfigurable (PR) modules in the system;

performing one of placing and routing the static logic modules with resources assigned;

re-assigning un-used assigned resources of the static logic modules to the PR modules; and

performing one of placing and routing instances of one of the PR modules on the target device in parallel with the resources assigned, wherein a first instance of a PR module is one of placed and routed using a first processing resource in parallel with a second instance of the PR module that is placed and routed using a second processing resource.

2. The method of claim 1 , wherein each instance of the one of the PR modules comprises a different circuit description of the PR module and each of the different circuit description interfaces with a same static logic.

3. The method of claim 1 , wherein the assigning comprises assigning resources to each of the static logic modules and PR modules from a floor plan region.

4. The method of claim 1 wherein performing one of placing and routing the static logic modules with the resources assigned is performed before performing one of placing and routing the PR modules.

5. The method of claim 1 , wherein re-assigning the un-used resources comprises:

expanding floor plan regions on the target device for the PR modules and assigning resources to each of the PR modules from its corresponding floor plan region.

6. The method of claim 5 , wherein the expanding comprises moving horizontal boundary edges of each floor plan region vertically and moving vertical boundary edges of each of the floor plan region horizontally until the horizontal boundary edges and vertical boundary edges reach a boundary of the target device or a boundary edge corresponding to another PR module.

7. The method of claim 1 , wherein the static logic module and PR modules comprises a hardware description language of circuitry.

8. A non-transitory computer readable medium including a sequence of instructions stored thereon for causing a computer to execute a method comprising:

assigning resources on a target device to static logic modules and partial reconfigurable (PR) modules in the system;

performing one of placing and routing the static logic modules with resources assigned;

re-assigning un-used assigned resources of the static logic modules to the PR modules; and

performing one of placing and routing instances of one of the PR modules on the target device in parallel with the resources assigned, wherein a first instance of a PR module is one of placed and routed using a first processing resource in parallel with a second instance of the PR module that is placed and routed using a second processing resource.

9. The non-transitory computer readable medium of claim 8 , wherein each instance of the one of the PR modules comprises a different circuit description of the PR module and each of the different circuit description interfaces with a same static logic.

10. The non-transitory computer readable medium of claim 8 , wherein the assigning comprises assigning resources to each of the static logic modules and PR modules from a floor plan region.

11. The non-transitory computer readable medium of claim 8 , wherein performing one of placing and routing the static logic modules with the resources assigned is performed before performing one of placing and routing the PR module.

12. The non-transitory computer readable medium of claim 8 , wherein re-assigning the un-used assigned resources comprises:

expanding floor plan regions on the target device for the PR modules and re-assigning the un-used assigned resources to each of the PR modules from its corresponding floor plan region.

13. The non-transitory computer readable medium of claim 12 , wherein the expanding comprises moving horizontal boundary edges of each floor plan region vertically and moving vertical boundary edges of each of the floor plan region horizontally until the horizontal boundary edges and vertical boundary edges reach a boundary of the target device or a boundary edge corresponding to another PR module.

14. The non-transitory computer readable medium of claim 8 , wherein the static logic module and PR modules comprises a hardware description language of circuitry.