IP Library › Granted Patent US 8,680,881
Granted Patent B2
US 8,680,881 · App. 13/044,717 · Granted Mar 25, 2014

Test method and interposer used therefor

Inventors: Yutaka Uematsu (Chiyoda-ku, JP); Hideki Osaka (Chiyoda-ku, JP); Satoshi Nakamura (Chiyoda-ku, JP); Satoshi Muraoka (Chiyoda-ku, JP); Mitsuaki Katagiri (Chuo-ku, JP); Ken Iwakura (Chuo-ku, JP); Yukitoshi Hirose (Chuo-ku, JP)
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Quick Facts
Patent No.
US 8,680,881
App. No.
13/044,717
Granted
Mar 25, 2014
Kind
B2
Abstract

An interposer to be mounted with an integrated circuit to be a test object is provided with a switch and a probe to detect an electric current corresponding to individual terminals of the integrated circuit. A test pattern signal is then inputted to the integrated circuit through a test substrate as a switch that is connected to a power supply terminal of the integrated circuit and that is turned off. If the integrated circuit normally operates and the current values of all the terminals of the integrated circuit are within a tolerance, the power supply terminal connected to the turned-off switch is identified as a terminal that may be removed.

Claims (27)

1. A test method comprising:

connecting an integrated circuit to a test substrate through an interposer, said test substrate being configured to supply electric power and a test pattern signal to said integrated circuit, and said interposer having a probe configured to detect an electric current flowing through an individual terminal of said integrated circuit and a switch connected to said individual terminal in series;

inputting and supplying the electric power and said test pattern signal to said integrated circuit through said test substrate after turning off at least one switch connected to an individual terminal for power supply of said integrated circuit;

acquiring a processed result processed by said integrated circuit according to said test pattern signal;

measuring an electric current flowing through said individual terminal of said integrated circuit;

determining whether a current value of the measured electric current is within a preset tolerance, while said integrated circuit is performing processing according to said test pattern signal;

determining whether said processed result that is realized by said integrated circuit is correct; and

determining that the individual terminal for power supply connected to the switch that is turned off in the inputting step is a terminal that may be removed from said integrated circuit, if it is determined that said processed result is correct in the processed result determining step and if it is determined that the current value of the electric current flowing through the individual terminal for power supply of said integrated circuit is within the preset tolerance in the current value determining step.

2. The test method according to claim 1 , wherein in the inputting step, a connecting or disconnecting state of a switch is changed, or a connecting or disconnecting state of a combination of switches is changed, in the switches connected to the individual terminals for power supply of said integrated circuit, and

wherein the acquiring step, the processed result determining step, the current value determining step, and the removal determining step are repeated.

3. The test method according to claim 1 , wherein in the current value determining step, if it is determined that a current value of an electric current flowing through any one of said individual terminals of said integrated circuit exceeds the preset tolerance, inputting the electric power and said test pattern signal to said integrated circuit is stopped.

4. A test system comprising:

an interposer having a probe configured to detect an electric current flowing through an individual terminal of an integrated circuit and a switch connected to said individual terminal in series, the interposer being mounted with said integrated circuit to be a test object;

a power supply device supplying electric power to said integrated circuit;

a pattern generator generating a predetermined test pattern signal to be supplied to said integrated circuit;

a current measuring device measuring an electric current flowing through said individual terminal of said integrated circuit using said probe;

a test substrate supplying the electric power and said test pattern signal to said integrated circuit through said interposer, the test substrate being mounted with said interposer; and

a controller comprising:

a test terminal selecting unit turning off at least one switch connected to an individual terminal for power supply of said integrated circuit and supplying and stopping the electric power and said test pattern signal to said integrated circuit,

a current monitoring unit determining whether the measured electric current flowing through said individual terminal of said integrated circuit by said current measuring device is within a preset tolerance, while said integrated circuit is performing processing according to said test pattern signal,

a processed result determining unit acquiring a processed result processed by said integrated circuit according to said test pattern signal and determining whether said processed result that is realized by said integrated circuit is correct, and

a removal determining unit determining that the individual terminal for power supply connected to the switch that is turned off by said test terminal selecting unit is a terminal that may be removed from said integrated circuit, if said processed result determining unit determines that said processed result is correct and if said current monitoring unit determines that the current value of the electric current flowing through the individual terminal for power supply of said integrated circuit is within the preset tolerance.

5. The test system according to claim 4 , wherein said probe of said interposer is a coil formed so as to surround a through hole disposed on a substrate, and

wherein said switch connects or disconnects said through hole to or from said individual terminal of said integrated circuit.

6. The test system according to claim 5 , wherein said interposer comprises a shield formed of a conductor that surrounds said coil.

7. The test system according to claim 4 , wherein said probe is a resistor connected to a through hole disposed on a substrate in series, and

wherein said switch connects or disconnects said through hole to or from said individual terminal of said integrated circuit through said resistor.

Assignments (5)
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032899/0588 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2011
From: UEMATSU, YUTAKA; OSAKA, HIDEKI; NAKAMURA, SATOSHI; MURAOKA, SATOSHI; KATAGIRI, MITSUAKI; IWAKURA, KEN; HIROSE, YUKITOSHI
To: ELPIDA MEMORY, INC.
Reel/Frame 025937/0657 →
Priority Claims (1)
JP 2010-066543 · Mar 23, 2010 · national
Continuity (1)
Related Publication 20110234249A1 · Sep 29, 2011