Nonvolatile memory device and manufacturing method thereof

1. A nonvolatile memory device comprising:

a peripheral circuit that includes a control element that controls a nonvolatile memory cell formed above a substrate;

a first wire that is formed above the peripheral circuit via an inter-layer dielectric film and is connected to the control element;

a memory layer in which a plurality of memory-cell-array layers is stacked on the inter-layer dielectric film in which the first wire is formed, each of the memory-cell-array layers including a plurality of nonvolatile memory cells each of which includes a nonvolatile memory element arranged at intersection positions of a plurality of second wires that extend in a first direction and a plurality of third wires that are formed at a height different from the second wires and extend in a second direction, the nonvolatile memory element being sandwiched between the second wires and the third wires;

contact plugs that connect between the second wires and the first wire and between the third wires and the first wire, and are formed in a peripheral portion of the memory layer; and

drawn wire portions that are connect the second wires and the third wires with the contact plugs in the memory layer, wherein

the drawn wire portions that are connected to a second wire and a third wire other than a second wire and a third wire of a bottom layer and a top layer of the memory layer are formed of a wire with a critical dimension in the nonvolatile memory device same as the second wires and the third wires and include two straight line portions that extend in a direction vertical to an extending direction of the second wires or the third wires and one of the straight line portions is connected to the contact plug on an upper surface and both side surfaces of the one of the straight line portions.

2. The nonvolatile memory device according to claim 1 , wherein one of the drawn wire portions is routed in a U shape from the second wire in a direction orthogonal to the second wire to come into contact with a respective contact plug.

3. The nonvolatile memory device according to claim 1 , wherein a lower end of each contact plug is connected to a pad of the bottom layer of the memory layer, and

the pad includes a plurality of loop-shaped wires having a width of the critical dimension same as the second wires and the third wires.

4. The nonvolatile memory device according to claim 3 , wherein

each of the loop-shaped wires includes a connection portion that connects both ends of a pair of adjacent straight line portions, and

the straight line portions have a wire width of the critical dimension and are arranged in a direction vertical to an extending direction of the straight line portions so as to form a line and space pattern.

5. The nonvolatile memory device according to claim 1 , wherein a lower end of the contact plug is connected to the first wire without a pad of the bottom layer of the memory layer.

6. The nonvolatile memory device according to claim 1 , wherein

the memory layer includes a plurality of memory layers, and

the contact plug of a memory layer other than a bottom layer is provided to correspond to a contact formation position of a memory layer on a lower layer side of the memory layer.

7. The nonvolatile memory device according to claim 1 , wherein the second wires are connected to a same contact plug every other memory layer.

8. The nonvolatile memory device according to claim 1 , wherein the nonvolatile memory element is a variable resistive element or a phase change memory.