Zoom motor noise reduction for camera audio recording
Zoom motor noise in a camera audio recording is reduced by detecting activity of the zoom motor, transforming a audio signal into the frequency domain during zoom motor activity, and scaling the frequency domain signal during zoom motor activity in each of a series of frequency bins by a scaling factor derived from a pre-stored zoom motor noise spectrum to produce a processed audio signal in the frequency domain. The processed audio signal is then transformed back to the time domain.
1. A method of reducing zoom motor noise in an audio signal from a video camera, comprising:
detecting activity of the zoom motor;
transforming the audio signal into a frequency domain signal during zoom motor activity;
scaling the frequency domain signal during zoom motor activity in each of a series of frequency bins by a scaling factor derived from a pre-stored zoom motor noise spectrum to produce a processed audio signal in the frequency domain; and
transforming the processed audio signal back to the time domain, and
wherein said scaling factor is given by the expression:
1
-
γ
i
·
SP
i
F
i
,
where γ i is a weighting factor, SP i is the noise spectrum of the zoom motor for each frequency bin i, and F i is the input signal magnitude in frequency bin i.
2. A method as claimed in claim 1 , wherein during periods of zoom motor inactivity the audio signal is subjected to a delay to match the signal processing delay incurred during periods of zoom motor activity.
3. A method as claimed in claim 1 , further comprising limiting the scaling factor of the processed audio signal to ensure that the processed signal in each frequency bin is always above zero.
4. A method as claimed in claim 1 , further comprising adding white noise to the processed audio signal to match the noise level in said processed audio signal and said audio signal.
5. A method as claimed in claim 4 , wherein the added white noise is about −50 dBm0.
6. A noise reduction circuit as claimed in claim 5 , comprising a divider for dividing a magnitude of the transformed audio signal F i into SP i , where SP i is the stored noise spectrum over the zoom motor for each frequency bin i, a multiplier for multiplying
SP
i
F
i
by a weighting factor γ i , and a subtractor for deriving the result
1
-
γ
i
·
SP
i
F
i
.
7. A noise reduction circuit as claimed in claim 6 , comprising a multiplexor arrangement configured to set the weighting factor γ i to a first value during normal operation, to increase the weighting factor when the signal power in a particular bin is less than a threshold value above the average noise spectrum, and to reduce the weighting factor when the total signal power in a block of signal data is less than a threshold value of the total average noise power in the block.
8. A noise reduction circuit for reducing zoom motor noise in an audio signal from a video camera, comprising:
a zoom motor activity detector;
a signal processor configured to transform the audio signal into the frequency domain during zoom motor activity to obtain a frequency domain signal, scale the frequency domain signal in each of a series of frequency bins by a scaling factor derived from a pre-stored motor noise spectrum during zoom motor activity to produce a processed audio signal in the frequency domain, and transform the processed audio signal back to the time domain; and
wherein said scaling factor is given by the expression:
1
-
γ
i
·
SP
i
F
i
,
where γ i is a weighting factor, SP i is the noise spectrum of the zoom motor for each frequency bin i, and F i is the input signal magnitude in frequency bin i.
9. A noise reduction circuit as claimed in claim 8 , further comprising a bypass path including a delay circuit for subjecting the audio signal to a delay during periods of zoom motor inactivity to match the signal processing delay incurred during periods of zoom motor activity.
10. A noise reduction circuit as claimed in claim 8 , further comprising a limiter for limiting the scaling factor of the processed audio signal to ensure that the processed signal in each frequency bin is always above zero.
11. A noise reduction circuit as claimed in claim 8 , further comprising a white noise generator and an adder for adding white noise to the processed audio signal to match the noise level in said processed audio signal and said audio signal.