IP Library Granted Patent US 8,462,577
Granted Patent B2
US 8,462,577 · App. 13/051,800 · Granted Jun 11, 2013

Single transistor driver for address lines in a phase change memory and switch (PCMS) array

Inventors: Raymond W. Zeng (Sunnyvale, CA); DerChang Kau (Cupertino, CA)
Assignee: Intel Corporation
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Quick Facts
Patent No.
US 8,462,577
App. No.
13/051,800
Granted
Jun 11, 2013
Kind
B2
Abstract

The present disclosure relates to the fabrication of non-volatile memory devices. In at least one embodiment, a single transistor may be used to drive each address line, either a wordline or a bitline. Both an inhibit voltage and a selection voltage may be driven through these single transistor devices, which may be achieved with the introduction of odd and even designations for the address lines. In one operating embodiment, a selected address line may be driven to a selection voltage, and the address lines of the odd or even designation which is the same as the selected address line are allowed to float. The address lines of the odd or even designation with is different from the selected address lines are driven to an inhibit voltage, wherein adjacent floating address lines may act as shielding lines to the selected address line.

Claims (16)

1. A method for programming a non-volatile memory cell, comprising:

assigning address lines with alternating odd and even designations;

driving a selected address line to a selection voltage;

allowing remaining address lines of the odd or even designation which is the same as the selected address line to float; and

driving address lines of the odd or even designation, which is different from the selected address line designation, to an inhibit voltage.

2. The method of claim 1 , wherein:

assigning address lines with alternating odd and even designations comprises assigning wordlines with alternating odd and even designations;

driving a selected address line to a selection voltage comprises driving a selected wordline to a selection voltage;

allowing remaining address lines of the odd or even designation which is the same as the selected address line to float comprises allowing remaining wordlines of the odd or even designation which is the same as the selected wordline to float; and

driving address lines of the odd or even designation which is different from the selected address line designation to an inhibit voltage comprises driving wordlines of the odd or even designation, which is different from the selected wordline designation, to an inhibit voltage.

3. The method of claim 1 , wherein:

assigning address lines with alternating odd and even designations comprises assigning bitlines with alternating odd and even designations;

driving a selected address line to a selection voltage comprises driving a selected bitline to a selection voltage;

allowing remaining address lines of the odd or even designation which is the same as the selected address line to float comprises allowing remaining bitlines of the odd or even designation which is the same as the selected bitline to float; and

driving address lines of the odd or even designation which is different from the selected address line designation to an inhibit voltage comprises driving bitlines of the odd or even designation, which is different from the selected bitline designation, to an inhibit voltage.

4. The method of claim 1 , wherein assigning address lines comprises assigning bitlines and wordlines with alternating odd and even designations, wherein driving a selected address line to a selection voltage comprises driving a selected bitline to a bitline selection voltage and a wordline to a wordline selection voltage, wherein allowing remaining address lines of the odd or even designation which is the same as the selected address line to float comprises allowing remaining bitlines of the odd or even designation which is the same as the selected bitline to float and allowing remaining wordlines of the odd or even designation which is the same as the selected wordline to float; and driving address lines of the odd or even designation which is different from the selected address line designation to an inhibit voltage comprises driving bitlines of the odd or even designation which is different from the selected bitline designation to a bitline inhibit voltage and driving wordlines of the odd or even designation which is different from the selected wordline designation to a wordline inhibit voltage.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2011
From: ZENG, RAYMOND W.; KAU, DERCHANG
To: INTEL CORPORATION
Reel/Frame 026621/0661 →
Continuity (1)
Related Publication 20120236676A1 · Sep 20, 2012