IP Library Granted Patent US 8,612,657
Granted Patent B2
US 8,612,657 · App. 13/059,084 · Granted Dec 17, 2013

System and method for communicating on an electrical bus

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Quick Facts
Patent No.
US 8,612,657
App. No.
13/059,084
Granted
Dec 17, 2013
Kind
B2
Abstract

Method and apparatus for communicating on an electrical bus by generating a master logical signal on the electrical bus in the form of a pulse-width modulation signal. Generating a slave logical signal on the electrical bus in the form of a current signal. Reading the slave logical signal by sampling the magnitude of the current signal on the electrical bus, wherein magnitude of the current on the electrical bus is sampled at a point in the bit time when the voltage on the electrical bus has remained constant for a period longer than the shortest time that the voltage remains at any level during the bit time.

Claims (39)

1. A method for communicating on an electrical bus between a master device and a slave device, the method comprising:

generating a master logical signal on the electrical bus during a bit time, wherein

said generating the master logical signal is performed by the master device,

the master logical signal comprises a voltage pulse defined by an increase in voltage magnitude and a decrease in voltage magnitude on the electrical bus, and

the time that the voltage on the electrical bus is at a level within the bit time is dependent on the logical value of the master logical signal;

generating a slave logical signal on the electrical bus during the same bit time, wherein

said generating the slave logical signal is performed by the slave device

the slave logical signal comprises a current signal, and

the magnitude of the current signal is dependent on the logical value of the slave logical signal; and

reading the slave logical signal by sampling the magnitude of the current signal on the electrical bus substantially at the same time as the increase in voltage magnitude when a logic generator is generating a first type of logical signal and at substantially the same time as the decrease in voltage magnitude when the logic generator is generating a second different type of logical signal.

2. The method of claim 1 , wherein the electrical bus comprises two conductors.

3. The method of claim 2 , wherein one of the two conductors is grounded.

4. The method of claim 2 further comprising:

applying the voltage pulse on the electrical bus in the form of a voltage differential between the two conductors.

5. The method of claim 4 , wherein the voltage pulse has a positive or a negative voltage.

6. The method of claim 5 , wherein a capacitance is in parallel with the electrical bus.

7. The method of claim 6 , wherein the capacitance is arranged to be charged by the voltage pulse.

8. The method of claim 7 , further comprising:

fully charging the capacitance within the duration of the voltage pulse.

9. The method of claim 8 , wherein the slave device further comprises an airbag sensor.

10. The method of claim 6 further comprising:

generating a master logical signal on the electrical bus in the form of a pulse-width modulation signal, wherein said generating is performed by the master device.

11. A communication system comprising:

an electrical bus for communicating between one or more devices;

a master device arranged to generate a master logical signal on the electrical bus during a bit time in the form of a voltage pulse defined by an increase in voltage magnitude and a decrease in voltage magnitude on the electrical bus, wherein the time that the voltage on the electrical bus is at a level within the bit time is dependent on the logical value of the master logical signal type;

a slave device arranged to generate a slave logical signal on the electrical bus during the same bit time in the form of a current signal, wherein the magnitude of the current signal is dependent on the logical value of the slave logical signal; and

a receiver arranged to read the slave logical signal by sampling the magnitude of the current signal on the electrical bus substantially at the same time as the increase in voltage magnitude when the logic generator is generating a first type of logical signal and at substantially the same time as the decrease in voltage magnitude when the logic generator is generating a second different type of logical signal.

12. A vehicle comprising the communication system of claim 11 .

13. The communication system of claim 11 , wherein the electrical bus comprises two conductors.

14. The communication system according to claim 11 , wherein the voltage pulse has a positive or a negative voltage.

15. The communication system of claim 13 , wherein one of the two conductors is grounded.

16. The communication system of claim 13 further comprising:

the master device further arranged to apply the voltage pulse on the electrical bus in the form of a voltage differential between the two conductors.

17. The communication system according to claim 14 further comprising a capacitance parallel with the electrical bus.

18. The communication system of claim 17 , wherein the capacitance is arranged to be charged by the voltage pulse.

19. The communication system of claim 18 , wherein the capacitance is arranged to be fully charged within the duration of the voltage pulse.

20. A communication device arranged to communicate with other devices on an electrical bus, the communication device comprises:

a logic generator arranged to generate a logical signal on the electrical bus in the form of a voltage pulse defined by an increase in voltage magnitude and a decrease in voltage magnitude, wherein the time that the voltage on the electrical bus is at a level within a bit time is dependent on the logical value of the logical signal; and

a current sensor arranged to sample the magnitude of current on the electrical bus substantially at the same time as the increase in voltage magnitude when the logic generator is generating a first type of logical signal and at substantially the same time as the decrease in voltage magnitude when the logic generator is generating a second different type of logical signal.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0075 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2011
From: LANCE, PHILIPPE; BERNON-ENJALBERT, VALERIE; CASSAGNES, THIERRY
To: FREESCALE SEMICONDUCTOR INC.
Reel/Frame 025807/0872 →