Semiconductor device having a base, a cavity, a diaphragm, and a substrate
A semiconductor device has a semiconductor element having a base, a cavity having a polygonal horizontal cross-section penetrating vertically through the base, a diaphragm arranged on the base to cover the cavity, and a substrate formed with a die bonding pad. A lower surface of the semiconductor element is adhered on the die bonding pad with a die bonding resin. The die bonding pad is formed so as not to contact a lower end of a valley section formed by an intersection of wall surfaces of an inner peripheral surface of the cavity of the semiconductor element.
1. A semiconductor device comprising:
a semiconductor element comprising:
a base;
a cavity having a polygonal horizontal cross-section penetrating vertically through the base;
a diaphragm arranged on the base to cover the cavity; and
a substrate formed with a die bonding pad,
wherein the cavity comprises an inner peripheral surface having two wall surfaces,
wherein a lower surface of the semiconductor element is adhered on the die bonding pad with a silicone die bonding resin,
wherein the silicone die bonding resin is formed so as not to contact a lower end of a valley section formed by an intersection of the two wall surfaces of the inner peripheral surface of the cavity of the semiconductor element, and
wherein the cavity completely overlaps a solder resist region comprising a solder resist protected portion of a conductor pattern.
2. The semiconductor device according to claim 1 , wherein
the substrate is a printed substrate, the die bonding pad being formed to include the conductor pattern; and
a portion of the conductor pattern is removed in a region facing the lower end of the valley section.
3. The semiconductor device according to claim 2 , wherein at least one part of a surface of an outer peripheral portion of the conductor pattern removed region of the conductor pattern is formed by an inorganic material.
4. The semiconductor device according to claim 1 , wherein an outer peripheral edge of the die bonding pad is positioned on an outer side than an outer peripheral edge of the lower surface of the semiconductor element.
5. The semiconductor device according to claim 1 , wherein the lower surface of the semiconductor element has an entire surface excluding a region in the vicinity of the lower end of the valley section adhered to the die bonding pad.
6. The semiconductor device according to claim 2 , wherein at least one part of a surface of an outer peripheral portion of the conductor pattern removed region of the conductor pattern is formed by copper (Cu).
7. The semiconductor device according to claim 2 , wherein at least one part of a surface of an outer peripheral portion of the conductor pattern removed region of the conductor pattern is formed by gold (Au).
8. The semiconductor device according to claim 3 , wherein the inorganic material is copper (Cu) or gold (Au).
9. A semiconductor device comprising:
a semiconductor element comprising:
a base;
a cavity having a polygonal horizontal cross-section penetrating vertically through the base;
a diaphragm arranged on the base to cover the cavity; and
a substrate formed with a die bonding pad,
wherein the cavity comprises an inner peripheral surface having two wall surfaces,
wherein a lower surface of the semiconductor element is adhered on the die bonding pad with a silicone die bonding resin,
wherein the silicone die bonding resin is formed so as not to contact a lower end of a valley section formed by an intersection of the two wall surfaces of the inner peripheral surface of the cavity of the semiconductor element,
wherein the substrate is a printed substrate, the die bonding pad being formed to include a conductor pattern of the printed substrate,
wherein a portion of the conductor pattern is removed in a region facing the lower end of the valley section,
wherein a non-removed portion of the conductor pattern of the printed substrate is disposed in a horizontal plane including the region facing the lower end of the valley section where the conductor pattern is removed,
wherein the non-removed portion of the conductor pattern faces the diaphragm, and
wherein the cavity completely overlaps a solder resist region comprising the non-removed portion of the conductor pattern, wherein the non-removed portion of the conductor pattern is a solder resist protected conductor pattern.