IP Library Granted Patent US 8,482,106
Granted Patent B2
US 8,482,106 · App. 13/060,324 · Granted Jul 9, 2013

Method for producing ceramic passivation layers on silicon for solar cell manufacture

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Quick Facts
Patent No.
US 8,482,106
App. No.
13/060,324
Granted
Jul 9, 2013
Kind
B2
Abstract

The invention relates to a method for producing passivation layers on crystalline silicon by a) coating the silicon with a solution containing at least one polysilazane of the general formula (1): —(SiR′R″—NR′″)-n, wherein R′, R″, R′″ are the same or different and stand independently of each other for hydrogen or a possibly substituted alkyl, aryl, vinyl, or (trialkoxysilyl)alkyl group, wherein n is an integer and n is chosen such that the polysilazane has a number average molecular weight of 150 to 150,000 g/mol, b) subsequently removing the solvent by evaporation, whereby polysilazane layers of 50-500 nm thickness remain on the silicon wafer, and c) heating the polysilazane layer at normal pressure to 200-1000° C. in the presence of air or nitrogen, wherein upon tempering the ceramic layers release hydrogen for bulk passivation of the silicon.

Claims (18)

1. A process for producing a passivation layer on crystalline silicon comprising the steps of

a) coating the silicon with a solution containing at least one polysilazane of the formula (1),

—(SiR′R″—NR′″) n -  (1)

where R′, R″, R′″ are identical or different and are each, independently of one another, hydrogen or a substituted or unsubstituted alkyl, aryl, vinyl or (trialkoxysilyl)alkyl radical and n is an integer and n has such a value that the polysilazane has a number average molecular weight of from 150 to 150,000 g/mol,

b) removing the solvent by evaporation, resulting in polysilazane layer having a thickness of 50-500 nm remaining on the silicon wafer, and

c) heating the polysilazane layer to 200-1000° C. at atmospheric pressure in the presence of air or nitrogen, resulting in the ceramic layer liberating hydrogen during the heat treatment to effect volume passivation of the silicon.

2. The process as claimed in claim 1 , wherein a ceramic Layer

Si u N v H w O x C y   (4)

wherein

u=1; v=1.3-0; w=3-0; x=1.3-0; Y=1.5-0,

is formed on the substrate and the ceramic layer serves as hydrogen diffusion source for volume passivation.

3. The process as claimed in claim 1 , wherein the polysilazane solution contains at least one perhydropolysilazane wherein R′, R″ and R′″═H.

4. The process as claimed in claim 1 , wherein coating takes place in the presence of air and phases of the composition in which x>v, where v<1 and x<1.3 and are not equal to zero, and w=2.5-0 and y<0.5, with u in each case being 1, are formed.

5. The process as claimed in claim 1 , wherein coating takes place in the presence of nitrogen and phases of the composition in which v<1.3 and x<0.1 and w=2.5-0 and y<0.2, with u in each case being 1, are formed.

6. The process as claimed in at claim 1 , wherein the ceramic layer has a thickness in the range from 10 to 200 nm.

7. The process as claimed in claim 1 , wherein the polysilazane solution contains a catalyst and optionally, further additives.

8. The process as claimed in claim 1 , wherein the ceramic layer is applied to n-type silicon.

9. The process as claimed in claim 1 , wherein the ceramic layer is applied to p-type silicon.

Assignments (1)
CHANGE OF ADDRESS Recorded Jan 12, 2017
From: AZ ELECTRONIC MATERIALS (LUXEMBOURG) S.À R.L.
To: AZ ELECTRONIC MATERIALS (LUXEMBOURG) S.À R.L.
Reel/Frame 041345/0585 →