Composite semiconductor substrates for thin-film device layer transfer
View Patent ↗Described herein are composite semiconductor substrates for use in semiconductor device fabrication and related devices and methods. In one embodiment, a composite substrate includes: (1) a bulk silicon layer; (2) a porous silicon layer adjacent to the bulk silicon layer, wherein the porous silicon layer has a Young's modulus value that is no greater than 110.5 GPa; (3) an epitaxial template layer, wherein the epitaxial template layer has a root-mean-square surface roughness value in the range of 0.2 nm to 1 nm; and (4) a set of silicon nitride layers disposed between the porous silicon layer and the epitaxial template layer.
1. A semiconductor device fabrication method, comprising:
providing a first substrate including a first semiconductor material, wherein the first substrate has a first Young's modulus value;
forming a porous layer within the first substrate, wherein the porous layer has a second Young's modulus value in the range of 35 percent to 65 percent of the first Young's modulus value;
forming a first bonding layer adjacent to the porous layer of the first substrate;
providing a second substrate including a second semiconductor material, wherein the second semiconductor material is different from the first semiconductor material;
forming a second bonding layer adjacent to a surface of the second substrate;
implanting hydrogen ions in the second substrate;
bonding the first bonding layer of the first substrate with the second bonding layer of the second substrate to form a set of bonded substrates; and
based on the implanted hydrogen ions, exfoliating a layer of the second semiconductor material adjacent to the second bonding layer, wherein the exfoliated layer of the second semiconductor material is separated from a remainder of the second substrate so as to form a composite substrate including the exfoliated layer of the second semiconductor material, wherein the set of bonded substrates is a first set of bonded substrates, and further comprising:
forming a device layer adjacent to the exfoliated layer of the second semiconductor material;
bonding the device layer with a device substrate to form a second set of bonded substrates; and
separating the second set of bonded substrates along an interface within the porous layer to form a semiconductor device, wherein the semiconductor device includes the device substrate and the device layer bonded to the device substrate.
2. The semiconductor device fabrication method of claim 1 , wherein the first semiconductor material is a Group IV semiconductor material, and the second semiconductor material is a Group III-V semiconductor material.
3. The semiconductor device fabrication method of claim 2 , wherein the first semiconductor material is silicon, the second semiconductor material is indium phosphide, the first bonding layer is a first silicon nitride layer, and the second bonding layer is a second silicon nitride layer.
4. The semiconductor device fabrication method of claim 2 , wherein the first substrate is a p+-type silicon substrate.
5. The semiconductor device fabrication method of claim 4 , wherein forming the porous layer includes subjecting the p+-type silicon substrate to anodic etching based on a current density in the range of 10 mA/cm 2 to 100 mA/cm 2 , an anodization time interval in the range of 10 seconds to 5 minutes, and an electrolyte including hydrofluoric acid, deionized water, and ethanol.
6. The semiconductor device fabrication method of claim 2 , wherein exfoliating the layer of the second semiconductor material includes:
annealing the first set of bonded substrates at a first temperature T 1 for a first time interval t 1 ; and
annealing the first set of bonded substrates at a second temperature T 2 for a second time interval t 2 ,
wherein T 1 <T 2 and t 1 >t 2 .
7. The semiconductor device fabrication method of claim 6 , wherein T 1 is in the range of 100° C. to 200° C., t 1 is in the range of 1 hr to 10 hr, T 2 is in the range of 250° C. to 350° C., and t 2 is in the range of 5 sec to 30 min.
8. The semiconductor device fabrication method of claim 5 , wherein the hydrofluoric acid, the deionized water, and the ethanol are substantially in a 1:1:2 ratio.
9. The semiconductor device fabrication method of claim 1 , wherein the second Young's modulus value is in the range of 45 percent to 55 percent of the first Young's modulus value.
10. The semiconductor device fabrication method of claim 1 , further comprising subjecting the exfoliated layer of the second semiconductor material to chemical mechanical polishing to form a substantially planar surface.