Motor driving circuit

1. A motor driving circuit configured to receive a Hall signal, which comprises a first signal and a second signal that are complementary, from a Hall sensor, and to PWM (Pulse Width Modulation) drive a motor, the motor driving circuit comprising:

a control instruction combining circuit configured to generate a duty ratio control signal which indicates a duty ratio for the PWM driving operation based upon first digital data which indicates the duty ratio for the PWM driving operation and second digital data which indicates the temperature;

a pulse modulator configured to convert the duty ratio control signal into a pulse control signal having the duty ratio indicated by the duty ratio control signal; and

a driver circuit configured to drive the fan motor based upon the pulse control signal,

wherein the control instruction combining circuit comprises:

a first calculation unit configured to subtract third digital data which indicates the minimum value of the duty ratio from the first digital data;

a slope calculation unit configured to generate temperature-dependent slope data based upon the second digital data;

a second calculation unit configured to multiply the slope data by the output data of the first calculation unit;

a third calculation unit configured to sum the output data of the second calculation unit and the third digital data; and

a selector configured to receive the output data of the third calculation unit and the third digital data, to select data that corresponds to the sign of the output data of the first calculation unit, and to output the data thus selected as the duty ratio control signal.

2. A motor driving circuit according to claim 1 , further comprising:

a terminal configured to receive, from an external circuit, an external pulse modulation signal subjected to pulse modulation; and

an instruction logic conversion circuit configured to receive the external pulse modulation signal, and to convert the external pulse modulation signal into the first digital data having a digital value that corresponds to the duty ratio of the external pulse modulation signal.

3. A motor driving circuit according to claim 2 , wherein the instruction logic conversion circuit comprises:

a level conversion circuit configured to multiply the external pulse modulation signal converted into a 1/0 binary signal by a coefficient 2L (L represents an integer); and

a digital low-pass filter configured to perform filtering of the output data of the level conversion circuit so as to output the first digital data.

4. A motor driving circuit according to claim 3 , wherein the digital low-pass filter is configured as a first-order IIR (Infinite Impulse Response) low-pass filter, comprising a fourth calculation unit, a delay circuit, and a fifth calculation unit, sequentially connected in series,

and wherein the fourth calculation unit is configured to sum the output data of the level conversion circuit and the output data of the delay circuit, and to subtract the output data of the fifth calculation unit from the sum result,

and wherein the delay circuit is configured to delay the output data of the fourth calculation unit,

and wherein the fifth calculation unit is configured to multiply the output data of the delay circuit by a coefficient 2 −n (n represents an integer).

5. A motor driving circuit according to claim 4 , wherein n is set such that the ripple width of the output data of the fifth calculation unit is 1 or less.

6. A motor driving circuit according to claim 4 , wherein the delay circuit delays the output data of the fourth calculation unit by T CLK in synchronization with a clock signal having the period T CLK .

7. A motor driving circuit according to claim 6 , wherein, with the frequency of the external pulse modulation signal as f PWM , the frequency f CLK of the clock signal is determined so as to satisfy a relation f CLK ≧2 L ×f PWM .

8. A cooling apparatus comprising:

a fan motor; and

a driving circuit configured to receive a Hall signal, which comprises a first signal and a second signal that are complementary, from a Hall sensor, and to PWM (Pulse Width Modulation) drive the fan motor, and wherein the motor driving circuit comprises:

a control instruction combining circuit configured to generate a duty ratio control signal which indicates a duty ratio for the PWM driving operation based upon first digital data which indicates the duty ratio for the PWM driving operation and second digital data which indicates the temperature;

a pulse modulator configured to convert the duty ratio control signal into a pulse control signal having the duty ratio indicated by the duty ratio control signal; and

a driver circuit configured to drive the fan motor based upon the pulse control signal,

wherein the control instruction combining circuit comprises:

a first calculation unit configured to subtract third digital data which indicates the minimum value of the duty ratio from the first digital data;

a slope calculation unit configured to generate temperature-dependent slope data based upon the second digital data;

a second calculation unit configured to multiply the slope data by the output data of the first calculation unit;

a third calculation unit configured to sum the output data of the second calculation unit and the third digital data; and

a selector configured to receive the output data of the third calculation unit and the third digital data, to select data that corresponds to the sign of the output data of the first calculation unit, and to output the data thus selected as the duty ratio control signal.

9. An electronic device comprising:

a processor; and

a cooling apparatus, configured to cool the processor wherein the cooling apparatus comprises:

a fan motor; and

a driving circuit configured to to receive a Hall signal, which comprises a first signal and a second signal that are complementary, from a Hall sensor, and to PWM (Pulse Width Modulation) drive the fan motor, and wherein the motor driving circuit comprises:

a control instruction combining circuit configured to generate a duty ratio control signal which indicates a duty ratio for the PWM driving operation based upon first digital data which indicates the duty ratio for the PWM driving operation and second digital data which indicates the temperature;

a pulse modulator configured to convert the duty ratio control signal into a pulse control signal having the duty ratio indicated by the duty ratio control signal; and

a driver circuit configured to drive the fan motor based upon the pulse control signal,

wherein the control instruction combining circuit comprises:

a first calculation unit configured to subtract third digital data which indicates the minimum value of the duty ratio from the first digital data;

a slope calculation unit configured to generate temperature-dependent slope data based upon the second digital data;

a second calculation unit configured to multiply the slope data by the output data of the first calculation unit;

a third calculation unit configured to sum the output data of the second calculation unit and the third digital data; and

a selector configured to receive the output data of the third calculation unit and the third digital data, to select data that corresponds to the sign of the output data of the first calculation unit, and to output the data thus selected as the duty ratio control signal.