Semiconductor device
For suggesting a structure capable of achieving both a low start-up voltage and high breakdown voltage, a SiC vertical diode includes a cathode electrode, an n ++ cathode layer, an n − drift layer on the n ++ cathode layer, a pair of p + regions, an n + channel region formed between the n − drift layer and the p + region and sandwiched between the pair of p + regions, n ++ anode regions and an anode electrode formed on the n ++ anode regions and the p + regions.
1. A semiconductor device using silicon carbide as a substrate, the semiconductor device comprising:
a cathode electrode;
a cathode layer of a first conductivity type formed on the cathode electrode of the substrate and having a first impurity concentration;
a drift layer of the first conductivity type formed on the cathode layer and having a second impurity concentration lower than the first impurity concentration;
a pair of first semiconductor regions of a second conductivity type opposite to the first conductivity type formed above the drift layer, and having a third impurity concentration;
a channel region of the first conductivity type formed between the drift layer and the first semiconductor regions and sandwiched between the pair of first semiconductor regions and having a fourth impurity concentration higher than the second impurity concentration;
an anode region of the first conductivity type formed on the channel region and the pair of first semiconductor regions, and having a fifth impurity concentration higher than the third impurity concentration and the fourth impurity concentration; and
an anode electrode formed on the pair of first semiconductor regions and the anode region.
2. The semiconductor device according to claim 1 ,
wherein the first conductivity type is an n type and the second conductivity type is a p type.
3. The semiconductor device according to claim 1 ,
wherein the second impurity concentration is 5×10 15 cm −3 or higher and 1.8×10 16 cm −3 or lower.
4. The semiconductor device according to claim 1 ,
wherein the second impurity concentration is 8×10 15 cm −3 or higher and 1.5×10 16 cm −3 or lower.
5. The semiconductor device according to claim 1 ,
wherein the fourth impurity concentration is 8×10 16 cm −3 or higher and 1.8×10 17 cm −3 or lower.
6. The semiconductor device according to claim 3 ,
wherein the fourth impurity concentration is 8×10 16 cm −3 or higher and 1.8×10 17 cm −3 or lower.
7. The semiconductor device according to claim 6 ,
wherein the fifth impurity concentration is 2×10 20 cm −3 .
8. The semiconductor device according to claim 1 ,
wherein the anode region is wider than the width of the channel region between the pair of first semiconductor regions.