IP Library Granted Patent US 8,993,451
Granted Patent B2
US 8,993,451 · App. 13/088,106 · Granted Mar 31, 2015

Etching trenches in a substrate

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Quick Facts
Patent No.
US 8,993,451
App. No.
13/088,106
Granted
Mar 31, 2015
Kind
B2
Abstract

Etch stabilizing ions ( 37 ) are introduced, e.g., by ion implantation ( 34 ), into a portion ( 36 ) of a substrate ( 20 ) underlying an etch window ( 24 ) in a masking layer ( 22 ) covering the substrate ( 20 ), where a trench ( 26 ) is desired to be formed. When the portion ( 36 ) of the substrate ( 20 ) containing the etch stabilizing ions ( 37 ) is etched to form the trench ( 26 ), the etch stabilizing ions ( 37 ) are progressively released at the etch interface ( 28 ′) as etching proceeds, substantially preventing gas micro-bubbles or other reaction products at the etch interface ( 28 ′) from disrupting etching. Using this method ( 700 ), products containing trenches ( 26 ) are much more easily formed and such trenches ( 26 ) have much smoother interior surface ( 28 ).

Claims (32)

1. A method for providing an electronic product containing one or more trenches, comprising:

providing a substrate comprising a semiconductor material body having a principal surface;

forming a dielectric layer over the principal surface of the semiconductor material body;

producing at least one etch window in the dielectric layer;

introducing etch stabilizing ions into a portion of the semiconductor material body of the substrate proximate the principal surface and through the etch window in the dielectric layer, the etch stabilizing ions consisting essentially of fluorine ions implanted to a fluorine ion concentration greater than 5E18 ions per cm 3 ; and

forming the one or more trenches by etching away at least part of the semiconductor material body of the substrate containing the etch stabilizing ions through the etch window in the dielectric layer, the one or more trenches each comprising a cavity or micro-cavity extending into, but not through the semiconductor material body of the substrate, and having a width between about 500 and 1200 micrometers.

2. The method of claim 1 , wherein etching is carried out using tetra-methyl-ammonium hydroxide (TMAH).

3. The method of claim 2 , further comprising after etching using TMAH, removing TMAH etching reaction products from the portion of the semiconductor material body of the substrate.

4. The method of claim 1 , wherein the body of semiconductor material comprises silicon.

5. The method of claim 1 , wherein introducing the etch stabilizing ions comprises implanting the portion of the semiconductor material body with fluorine ions at a fluorine dose in the range of about 1E14 per cm 2 to 1E16 per cm 2 .

6. The method of claim 1 , wherein introducing the etch stabilizing ions comprises implanting the portion of the semiconductor material body with fluorine ion at one or more energies in the range of about 5 KeV to 1MeV.

7. the method of claim 1 , wherein introducing the etch stabilizing ions comprises implanting the portion of the semiconductor material body with fluorine ions at more than one energy.

8. A method for etching one or more trenches in a substrate, comprising:

providing a substrate adapted to receive the one or more trenches therein;

forming on the substrate a mask layer resistant to etching of the substrate;

opening an etch window in the mask layer overlying the desired location of the one or more trenches;

introducing fluorine ions into a portion of the substrate comprising a semiconductor material and underlying the etch window such that the portion of the substrate comprising the semiconductor material has a fluorine ion concentration greater than 5E18 per cm 3 ; and

forming the one or more trenches by etching at least part of the portion of the substrate comprising the semiconductor material, underlying the etch window, and containing the fluorine ions, the one or more trenches each comprising a cavity or micro-cavity having a width between about 100 and 2000 micrometers and a depth between about 2 and about 50 micrometers.

9. The method of claim 8 , wherein the semiconductor material comprises silicon.

10. The method of claim 9 , wherein the fluorine ions are introduced by ion implantation.

11. The method of claim 10 , wherein the ion implantation is performed at an energy in the range of about 5 KeV to 1MeV.

12. The method of claim 11 , wherein the ion implantation is provided at more than one energy to establish the concentration of implanted fluorine ions as a function of depth in the portion of the substrate comprising a semiconductor material.

13. The method of claim 9 , wherein the step of forming one or more trenches comprises, etching the portion of the substrate comprising a semiconductor material and underlying the etch window using tetra-methyl-ammonium hydroxide (TMAH).

14. The method of claim 13 , further comprising removing TMAH etching reaction products from the portion of the substrate comprising a semiconductor material and underlying the etch window.

15. The method of claim 8 wherein introducing the etch stabilizing ions comprises introducing etching stabilizing ions consisting essentially of fluorine ions into the portion of the semiconductor material body.

16. A method for forming a trench in a principle surface of a silicon wafer, comprising:

forming a dielectric layer over the principal surface of the silicon wafer;

producing an etch window in the dielectric layer;

implanting fluorine ions through the etch window and into a silicon-comprising portion of the silicon wafer proximate the principal surface; and

forming the trench by locally etching through the etch window the silicon-comprising portion of the silicon wafer containing the fluorine ions using tetra-methyl-ammonium hydroxide (TMAH), the trench comprising a cavity or micro-cavity extending into, but not through the silicon wafer;

wherein the etching step comprises at least two silicon etching steps separated by one or more cleaning steps.

17. The method of claim 16 wherein the etch window is produced to have a width and length generally corresponding to the desired width and length of the trench.

Assignments (29)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
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PATENT RELEASE Recorded Dec 21, 2015
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To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
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SECURITY AGREEMENT Recorded Nov 6, 2013
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SECURITY AGREEMENT Recorded Jun 18, 2013
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SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2011
From: KUNDALGURKI, SRIVATSA G.; MCHUGH, JAMES F.
To: FREESCALE SEMICONDUCTOR, INC.
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