IP Library Granted Patent US 8,486,732
Granted Patent B2
US 8,486,732 · App. 13/095,173 · Granted Jul 16, 2013

Method of manufacturing semiconductor light emitting device including step of performing etching process with respect to conductive support member

Inventors: Joo Yong Jung (Gwangju, KR); Young Kyu Jeong (Gwangju, KR)
Assignee: LG Innotek Co., Ltd.
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Quick Facts
Patent No.
US 8,486,732
App. No.
13/095,173
Granted
Jul 16, 2013
Kind
B2
Abstract

Disclosed are a light emitting device, a method of manufacturing the same, a light emitting device package, and a lighting system. The light emitting device includes a conductive support member, a light emitting structure layer including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on the conductive support member, and an electrode on the light emitting structure layer. The conductive support member has a curved lateral surface recessed inward.

Claims (36)

1. A method of manufacturing a semiconductor light emitting device, the method comprising:

forming a light emitting structure;

selectively forming a light emitting region protective layer under the light emitting structure, the light emitting region protective layer formed of an insulating material;

forming an electrode layer under the light emitting structure and the light emitting region protective layer;

forming a conductive support member under the electrode layer;

forming a chip boundary region among a plurality of chips by mesa-etching the light emitting structure to expose the light emitting region protection layer;

forming a first boundary which groups the chips into chip units along the chip boundary region and extends by passing through the conductive support member;

performing an etching process with respect to the conductive support member on the first boundary; and

performing a breaking process to separate the chips into the chip units.

2. The method as claimed in claim 1 , wherein the light emitting region protective layer is selectively formed under the light emitting structure along an outer peripheral portion of each chip.

3. The method as claimed in claim 1 , wherein the conductive support member has a thickness of about 10 μm to about 500 μm.

4. The method as claimed in claim 1 , further comprising forming at least one of a first support layer under the conductive support member and a first chip protective layer on the light emitting structure after forming the chip boundary region.

5. The method as claimed in claim 1 , further comprising forming a second support layer on a bottom surface of the conductive support member after performing an etching process on the first boundary.

6. The method as claimed in claim 5 , further comprising forming a second chip protective layer on the light emitting structure.

7. The method as claimed in claim 1 , wherein the light emitting structure is formed on a substrate, and the substrate is removed after the conductive support member is formed under the electrode layer.

8. The method as claimed in claim 1 , wherein the first boundary is formed through laser irradiation.

9. The method as claimed in claim 1 , wherein the etching process includes a wet etching process or a dry etching process.

10. The method as claimed in claim 9 , wherein, when the wet etching process is performed, a curved surface, which is recessed inward, is formed on a lateral side of the conductive support member.

11. The method as claimed in claim 1 , wherein the conductive support member is formed of at least one of Cu, Au, or Mo.

12. A method of manufacturing a semiconductor light emitting device, the method comprising:

forming a light emitting structure;

selectively forming a light emitting region protective layer under the light emitting structure;

forming an electrode layer under the light emitting structure and the light emitting region protective layer;

forming a conductive support member under the electrode layer, the conductive support member formed of at least one of Cu, Au, or Mo;

forming a chip boundary region among a plurality of chips by mesa-etching the light emitting structure;

forming a first boundary which groups the chips into chip units along the chip boundary region and extends by passing through the conductive support member;

performing an wet etching process with respect to the conductive support member on the first boundary so that a curved surface, which is recessed inward, is formed on a lateral side of the conductive support member; and

performing a breaking process to separate the chips into the chip units.

13. The method as claimed in claim 12 , wherein the light emitting region protective layer is selectively formed under the light emitting structure along an outer peripheral portion of each chip.

14. The method as claimed in claim 12 , wherein the conductive support member has a thickness of about 10 μm to about 500 μm.

15. The method as claimed in claim 12 , further comprising forming at least one of a first support layer under the conductive support member and a first chip protective layer on the light emitting structure after forming the chip boundary region.

16. The method as claimed in claim 12 , further comprising forming a second support layer on a bottom surface of the conductive support member after performing an etching process on the first boundary.

17. The method as claimed in claim 16 , further comprising forming a second chip protective layer on the light emitting structure.

18. The method as claimed in claim 12 , wherein the light emitting structure is formed on a substrate, and the substrate is removed after the conductive support member is formed under the electrode layer.

19. The method as claimed in claim 12 , wherein the first boundary is formed through laser irradiation.

20. The method as claimed in claim 12 , wherein the light emitting region protective layer is formed of an insulating material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2025
From: SUZHOU LEKIN SEMICONDUCTOR CO., LTD.
To: BOE HC SEMITEK LIMITED(HENGQIN)
Reel/Frame 070521/0027 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2021
From: LG INNOTEK CO., LTD.
To: SUZHOU LEKIN SEMICONDUCTOR CO., LTD.
Reel/Frame 056366/0335 →
Priority Claims (1)
KR 10-2009-0051249 · Jun 10, 2009 · national
Continuity (2)
Division 12796780 · Jun 9, 2010
Related Publication 20110201140A1 · Aug 18, 2011