Mixer circuits for second order intercept point calibration
View Patent ↗A balanced mixer circuit ( 300, 400, 500, 600, 700 and 800 ) in a baseband receiver ( 202 ) includes an oscillator circuit ( 212 ), a mixer ( 214 and 215 ), a digital-to-analog converter ( 258 and 259 ) and a digital signal processor ( 250 ). The mixer includes CMOS devices ( 301, 302, 303 and 304 ). In response to differential outputs from the mixer, the digital signal processor controls the digital-to-analog converter to output bias voltages for the gate of at least one of the CMOS devices of the mixer to compensate for imbalance in the differential output of the mixer that may be caused by mismatch among two or more CMOS devices of the mixer or caused by other reasons, in order to increase second order intercept point of the mixer.
1. A method in a receiver for correcting a differential output mismatch in a CMOS balanced mixer circuit, comprising:
determining a strength of an interferer signal received by the receiver relative to a predetermined threshold, and,
if the strength is above the predetermined threshold:
a) applying a fixed voltage at a gate of at least one device of the mixer circuit, the mixer circuit comprising a pair of differential signal inputs that input a pair of RF differential signals and a pair of differential signal outputs that output a pair of zero-IF differential signals converted by the mixer circuit from the pair of RF differential signals;
b) applying a compensating voltage at a gate of at least another device of the mixer circuit;
c) determining any difference between differential signal voltages outputted by the pair of differential signal outputs of the mixer circuit;
d) based on said difference, using a digital signal processor (DSP) to perform measurement of a value of an input-related second order intercept point of the mixer circuit;
e) using the DSP to output a digital signal in response to said measurement, the digital signal selected from a plurality of digital signals stored in the DSP;
f) based on the digital signal outputted by the DSP, changing a value of the compensating voltage at the gate of the at least another device;
g) repeating steps b) to f) for a preselected plurality number of times;
h) using the DSP to determine which one value of the compensating voltage applied at the gate of the at least another device produces a minimum second order intermodulation distortion in the receiver; and
i) operating the mixer circuit while the voltage at the gate of the at least another device is at the one value of the compensating voltage that produces the minimum second order intermodulation distortion in the receiver; and
if the strength is below the predetermined threshold:
operating the mixer circuit without attempting to provide input-related second order intercept point correction of the mixer circuit.
2. The method of claim 1 , in which the mixer is a doubled-balanced mixer comprising two balanced differential pairs, each balanced differential pair comprising two devices.
3. The method of claim 2 , in which the mixer is a passive mixer.
4. The method of claim 2 , in which the one value of the compensating voltage is applied at the gate of each device of a same balanced differential pair.
5. The method of claim 2 , in which the one value of the compensating voltage is applied at the gate of one device of one balanced differential pair and the fixed voltage is applied at the gate of a device of the other balanced differential pair.
6. The method of claim 5 , in which the one value of the compensating voltage is applied at the gate of one device of one balanced differential pair and the fixed voltage is applied at the gate of a corresponding device of the other balanced differential pair.
7. The method of claim 5 , in which the one value of the compensating voltage is applied at the gate of one device of one balanced differential pair and the fixed voltage is applied at the gate of a non-corresponding device of the other balanced differential pair.
8. The method of claim 2 , in which the mixer is disposed on an integrated circuit in a common-centroid layout.
9. The method of claim 2 , in which the doubled-balanced mixer includes a first balanced differential pair and a second balanced differential pair, and in which one value of the compensating voltage is applied at the gate of each device of the first balanced differential pair and the fixed voltage is applied at the gate of each device of the second balanced differential pair.
10. The method of claim 1 , in which the mixer is a passive mixer.
11. The method of claim 1 , in which the receiver includes baseband circuits, and,
if the strength is below the predetermined threshold:
operating the baseband circuits to provide input-related second order intercept point correction.
12. A method in a baseband receiver for correcting a differential output mismatch in a mixer circuit, the method comprising:
a) applying a fixed voltage at a gate of at least one device of the mixer circuit, the mixer circuit comprising a pair of differential signal inputs that input a pair of RF differential signals and a pair of differential signal outputs that output a pair of differential output current signals converted by the mixer circuit from the pair of RF differential signals, the mixer circuit in the baseband receiver comprising at least one of
an I-channel mixer with the pair of differential output current signals comprising a differential signal I+ and a differential signal I−, and
a Q-channel mixer with the pair of differential output current signals comprising a differential signal Q+ and a differential signal Q−;
b) applying a first value of a compensating voltage at a gate of at least another device of the mixer circuit;
c) determining any difference between voltages outputted by the pair of differential signal outputs of the mixer circuit while outputting the differential output current signals, where a zero difference between outputted voltages between the differential output current signals I+ and I− in the I-channel mixer corresponds to a matched pair of differential output current signals in the I-channel mixer, and a zero difference between outputted voltages between the differential output current signals Q+ and Q− in the Q-channel mixer corresponds to a matched pair of differential output current signals in the Q-channel mixer, and where a greater difference between voltages outputted by the pair of differential signal outputs of the mixer circuit corresponds to a greater mismatch between the respective differential output current signals I+ and I− in the I-channel mixer and Q+ and Q− in the Q-channel mixer, and where the greater the mismatch, the lower becomes a value of an input-related second order intercept point of the mixer circuit;
d) based on the determined difference, selecting a digital calibration word from among stored digital calibration words;
e) based on the selected digital calibration word, generating and applying a second value of the compensating voltage at the gate of the at least another device, the second value being different than the first value;
f) determining a value of the compensating voltage applied at the gate of the at least another device that produces a minimum difference between the voltages outputted by the pair of differential signal outputs of the mixer circuit, wherein the minimum difference between the voltages outputted by the pair of differential signal outputs of the mixer circuit corresponds to a least mismatch of the differential output current signals outputted by the pair of differential signal outputs of the mixer circuit; and
g) operating the mixer circuit while generating and applying the value of the compensating voltage at the gate of the at least another device.
13. The method of claim 12 , in which the mixer circuit includes a mixer and an active lowpass filter coupled to an output of the mixer, and including:
operating the active lowpass filter to perform further input-related second order intercept point calibration of the mixer circuit.
14. The method of claim 12 , wherein the value of the compensation voltage is one of:
a value of a common-mode voltage plus a value of an IIP2 correction voltage, and
a value of a common-mode voltage minus a value of an IIP2 correction voltage.
15. A method in a baseband receiver for correcting a differential output mismatch in a mixer circuit, the method comprising:
applying a first value of a compensating voltage at a gate of a device of a mixer circuit, the mixer circuit comprising a pair of differential signal inputs that input a pair of RF differential signals and a pair of differential signal outputs that output a pair of differential output current signals converted by the mixer circuit from the pair of RF differential signals;
while outputting the pair of differential output current signals from the mixer circuit, determining any difference between voltages outputted by the pair of differential signal outputs of the mixer circuit,
wherein a zero difference between the voltages outputted by the pair of differential signal outputs of the mixer circuit corresponds to a matched pair of differential output current signals,
wherein the greater is a difference between the voltages outputted by the pair of differential signal outputs of the mixer circuit, the greater is a mismatch between the differential output current signals, and
wherein the greater is the mismatch, the lower becomes a value of an input-related second order intercept point of the mixer circuit;
based on any difference between voltages outputted by the pair of differential signal outputs of the mixer circuit, selecting a digital calibration word from among stored digital calibration words;
based on the selected digital calibration word, generating and applying a second value of the compensating voltage at the gate of the device of the mixer circuit, the second value being different from the first value;
determining which one value of the compensating voltage applied at a gate of another device of the mixer circuit produces a minimum difference between the voltages outputted by the pair of differential signal outputs of the mixer circuit; and
operating the mixer circuit while generating and applying the one value of the compensating voltage at the gate of the other device of the mixer circuit that produced the determined minimum difference between the voltages outputted by the pair of differential signal outputs of the mixer circuit corresponding to a least mismatch of the differential output current signals outputted by the pair of differential signal outputs of the mixer circuit.