IP Library Granted Patent US 8,520,431
Granted Patent B2
US 8,520,431 · App. 13/096,966 · Granted Aug 27, 2013

Devices and methods to program a memory cell

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Quick Facts
Patent No.
US 8,520,431
App. No.
13/096,966
Granted
Aug 27, 2013
Kind
B2
Abstract

Subject matter disclosed herein relates to memory devices and, more particularly, to programming a memory cell.

Claims (23)

1. A method comprising:

respectively applying signals in a manner so as to transition a first memory cell and a second memory cell to a particular state, the first memory cell and the second memory cell, respectively, comprising the same memory cell during an initial period of time and during a later period of time, the initial and the later time periods being distinct and non-overlapping;

wherein a current signal is applied so as to transition the first memory cell, the current signal comprising a decreasing current ramp after the first memory cell enters a melting phase, and a voltage signal is applied so as to transition the second memory cell, the voltage signal comprising a decreasing voltage ramp after the second memory cell enters a melting phase.

2. The method of claim 1 , wherein the current signal and the voltage signal are applied in a manner that is not concurrent.

3. The method of claim 1 , wherein the first memory cell comprises a first group of PCM cells and the second memory cell comprises a second group of PCM cells; and

wherein the current signal is applied to the first group and the voltage signal is applied to the second group.

4. The method of claim 1 , wherein said applying signals comprises applying signals that decrease in signal value level over time.

5. The method of claim 4 , wherein said applying signals that decrease comprises applying signals that decrease approximately linearly in signal value level over time.

6. The method of claim 4 , and further comprising, for the current signal and the voltage signal, respectively, ceasing application responsive to detecting a desired signal value level.

7. A method comprising:

respectively applying signals in a manner so as to transition a first memory cell and a second memory cell to a particular state, the first memory cell and the second memory cell, respectively, comprising the same memory cell during an initial period of time and during a later period of time, the initial and the later time periods being distinct and non-overlapping;

wherein a current signal is applied so as to transition the first memory cell and a voltage signal is applied so as to transition the second memory cell, and wherein the first memory cell did not comply with desired memory cell performance parameters.

8. The method of claim 1 , wherein said applying signals comprises applying the signals to a resistive heater.

9. The method of claim 1 , wherein the first and second cells are arranged in a self heating configuration.

10. The method of claim 1 , wherein the transition is from a melting phase.

11. A device comprising:

a controller capable of operating in a current mode or in a voltage mode to program a memory cell to a set state, wherein the controller is capable of changing operation mode to program the memory cell to the set state after operation in one of the current mode or the voltage mode did not program the memory cell to the set state.

12. The device of claim 11 , wherein the controller is capable of operating in the current mode or in the voltage mode to program the memory cell to a crystalline state.

13. The device of claim 11 , wherein the controller is further capable of verifying that the cell stores the set state upon or after detecting a desired signal value level is produced.

14. A device comprising a controller capable of operating in a current mode or in a voltage mode to program a memory cell, wherein the controller includes a cascode configuration for the voltage mode operation.

15. The device of claim 11 , wherein the controller is further capable of operating in the current mode or in the voltage mode to program multiple cells of an array concurrently to the set state.

16. The device of claim 11 , wherein the controller is further capable of ceasing current mode operation or voltage mode operation upon or after detecting a desired signal value level is produced.

17. The device of claim 11 , wherein the controller is incorporated in at least one of the following: a cell phone, a personal digital assistant, an electronic tablet, a laptop or desktop computer, or any combination thereof.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2016
From: MICRON TECHNOLOGY, INC
To: OVONYX MEMORY TECHNOLOGY, LLC
Reel/Frame 039974/0496 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 28, 2011
From: DI VINCENZO, UMBERTO; LISI, CARLO
To: MICRON TECHNOLOGY, INC.
Reel/Frame 026198/0135 →