IP Library Granted Patent US 8,461,863
Granted Patent B2
US 8,461,863 · App. 13/097,816 · Granted Jun 11, 2013

Method and apparatus for securing a programmable device using a kill switch

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Quick Facts
Patent No.
US 8,461,863
App. No.
13/097,816
Granted
Jun 11, 2013
Kind
B2
Abstract

A kill switch is provided that, when triggered, may cause the programmable logic device (PLD) to become at least partially reset, disabled, or both. The kill switch may be implemented as a fuse or a volatile battery-backed memory bit. When, for example, a security threat is detected, the switch may be blown, and a reconfiguration of the device initiated in order to zero or clear some or all of the memory and programmable logic of the PLD.

Claims (35)

1. A programmable logic device, comprising:

a core configuration fabric configured to implement a security module;

a control block coupled to the core configuration fabric; and

a kill switch coupled to the control block, wherein the control block and the core configuration fabric are configured to blow the kill switch in response to an occurrence of a predefined event, wherein blowing the kill switch causes data stored within at least a portion of the programmable logic device to be changed.

2. The programmable logic device of claim 1 , wherein the kill switch comprises a fuse.

3. The programmable logic device of claim 1 , wherein at least a portion of the programmable logic device is disabled in response to the kill switch being blown.

4. The programmable logic device of claim 1 , further comprising I/O circuitry, wherein the I/O circuitry is disabled in response to the kill switch being blown.

5. The programmable logic device of claim 1 , further comprising decryption circuitry, wherein the decryption circuitry is disabled in response to the kill switch being blown.

6. The programmable logic device of claim 1 , further comprising:

a battery; and

volatile memory coupled to the battery for storing a decryption key, wherein data stored within the volatile memory is changed in response to the kill switch being blown.

7. The programmable logic device of claim 1 , further comprising key fuses for storing fuse bits representing a decryption key, wherein at least one of the key fuses is blown in response to the kill fuse being blown.

8. The programmable logic device of claim 1 , wherein the core configuration fabric comprises configuration memory.

9. The programmable logic device of claim 1 , wherein the core configuration fabric comprises logic array blocks.

10. A method for disabling a programmable logic device in response to an event, the method comprising:

detecting the event;

blowing a kill switch responsive to detection of the event; and

disabling at least a portion of the programmable logic device in response to the kill switch being blown, wherein disabling the at least a portion of the programmable logic device comprises removing configuration data stored in the programmable logic device.

11. The method of claim 10 , wherein detecting the event comprises using sticky bits stored in the programmable logic device to detect the event.

12. The method of claim 11 , wherein detecting the event comprises comparing a pattern of security bits in a programming object file (POF) bit-stream to at least some of the sticky bits.

13. The method of claim 11 , wherein detecting the event comprises detecting that at least one of the sticky bits has been unintentionally modified.

14. The method of claim 10 , wherein disabling the at least a portion of the programmable logic device comprises zeroing volatile memory that stores a key.

15. The method of claim 10 , wherein disabling the at least a portion of the programmable logic device comprises blowing at least one fuse associated with a key.

16. The method of claim 10 , wherein disabling the at least a portion of the programmable logic device comprises disabling I/O circuitry.

17. The method of claim 10 , wherein disabling the at least a portion of the programmable logic device comprises disabling decryption circuitry.

18. The method of claim 10 , wherein disabling the at least a portion of the programmable logic device comprises initiating a reconfiguration of the programmable logic device.

19. The method of claim 10 , further comprising resetting at least a portion of the programmable logic device in response to the kill switch being blown.

20. A method for disabling a programmable logic device in response to an event, the method comprising:

detecting the event, wherein detecting the event comprises using sticky bits stored in the programmable logic device to detect the event;

blowing a kill switch responsive to detection of the event; and

disabling at least a portion of the programmable logic device in response to the kill switch being blown.

21. The method of claim 20 , wherein detecting the event comprises comparing a pattern of security bits in a programming object file (POF) bit-stream to at least some of the sticky bits.

22. The method of claim 20 , wherein detecting the event comprises detecting that at least one of the sticky bits has been unintentionally modified.

23. The method of claim 20 , wherein disabling the at least a portion of the programmable logic device comprises automatically causing data stored within the at least a portion of the programmable logic device to be changed.

24. The method of claim 20 , wherein disabling the at least a portion of the programmable logic device comprises blowing at least one fuse associated with a key.

Assignments (2)
SECURITY INTEREST Recorded Sep 12, 2025
From: ALTERA CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 073431/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2011
From: PEDERSEN, BRUCE B.; REESE, DIRK A.; JOYCE, JUJU
To: ALTERA CORPORATION
Reel/Frame 026447/0118 →