IP Library › Granted Patent US 9,478,185
Granted Patent B2
US 9,478,185 · App. 13/100,808 · Granted Oct 25, 2016

Electro-optical display device and display method thereof

Inventor: Yasuhiko Takemura (Isehara, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
G09G3/3659G09G2300/0417G09G2300/0823G09G2300/0861
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Quick Facts
Patent No.
US 9,478,185
App. No.
13/100,808
Granted
Oct 25, 2016
Kind
B2
Abstract

A method of reducing power consumption of an electro-optical display device which can display a still image with the use of analog signals. A circuit in which low leakage current flows between a source and a drain of a selection transistor when the selection transistor is off; the source of the selection transistor is connected to a gate of a first driving transistor, a gate of a second driving transistor, and one electrode of a display element; and a source of the second driving transistor is connected to the other electrode of the display element is provided in each pixel. A gate and the drain of the selection transistor are connected to a scan line and a signal line, respectively. A drain of the first driving transistor is connected to a first power supply line. A drain of the second driving transistor is connected to a second power supply line.

Claims (60)

1. An electro-optical display device comprising a pixel, the pixel comprising:

a first transistor including an oxide semiconductor containing indium in its channel;

a second transistor including silicon in its channel;

a third transistor including silicon in its channel;

a capacitor; and

a display element,

wherein a source of the first transistor is electrically connected to a gate of the second transistor, a gate of the third transistor, and one electrode of the capacitor,

wherein a source of the second transistor is electrically connected to one electrode of the display element,

wherein a drain of the second transistor and the other electrode of the capacitor are electrically connected to a capacitor line,

wherein a source of the third transistor is electrically connected to the other electrode of the display element,

wherein a gate of the first transistor is electrically connected to a scan line,

wherein a drain of the first transistor is electrically connected to a signal line,

wherein the second transistor and the third transistor have the same conductivity type,

wherein a leakage current of the first transistor is less than or equal to 1×10 −20 A at a temperature of 25° C.,

wherein an off-state current of the first transistor is less than or equal to 1/100 of a leakage current of the display element, and

wherein a capacitance of the capacitor is less than or equal to 1/10 of a capacitance of the display element.

2. The electro-optical display device according to claim 1 , wherein a drain of the third transistor is connected to a second power supply line.

3. The electro-optical display device according to claim 1 , wherein the drain of the third transistor is connected to a capacitor line in a subsequent row or a subsequent column.

4. The electro-optical display device according to claim 1 , wherein the first transistor is an N-channel transistor.

5. The electro-optical display device according to claim 1 , wherein a frame period is longer than or equal to 100 seconds.

6. The electro-optical display device according to claim 1 , wherein time for writing of one screen is shorter than or equal to 0.2 milliseconds.

7. An electro-optical display device comprising a pixel, the pixel comprising:

a selection transistor including an oxide semiconductor containing indium it its channel;

a first driving transistor including silicon in its channel;

a second driving transistor including silicon in its channel;

a capacitor; and

a display element comprising a first electrode and a second electrode,

wherein a source of the selection transistor is electrically connected to a gate of the first driving transistor, a gate of the second driving transistor and one electrode of the capacitor,

wherein a source of the first driving transistor is electrically connected to the first electrode,

wherein a source of the second driving transistor is electrically connected to the second electrode,

wherein a drain of the second driving transistor and the other electrode of the capacitor are electrically connected to a capacitor line,

wherein a gate of the selection transistor is electrically connected to a scan line,

wherein a drain of the selection transistor is electrically connected to a signal line,

wherein the first driving transistor and the second driving transistor have the same conductivity type,

wherein a leakage current of the first transistor is less than or equal to 1×10 −20 A at a temperature of 25° C., and

wherein an off-state current of the selection transistor is less than or equal to 1/100 of a leakage a current of the display element.

8. The electro-optical display device according to claim 7 , wherein the display element is a liquid crystal display element.

9. The electro-optical display device according to claim 7 , wherein a display mode of the electro-optical display device is in-plane switching.

10. The electro-optical display device according to claim 7 , wherein a display mode of the electro-optical display device is fringe field switching.

11. An electro-optical display device comprising a pixel, the pixel comprising:

a selection transistor including an oxide semiconductor containing indium it its channel;

a first driving transistor including silicon in its channel;

a second driving transistor including silicon in its channel;

a capacitor; and

a display element comprising a first electrode and a second electrode,

wherein a source of the selection transistor is electrically connected to a gate of the first driving transistor, a gate of the second driving transistor and one electrode of the capacitor,

wherein a source of the first driving transistor is electrically connected to the first electrode,

wherein a source of the second driving transistor is electrically connected to the second electrode,

wherein a drain of the second driving transistor and the other electrode of the capacitor are electrically connected to a capacitor line,

wherein a gate of the selection transistor is electrically connected to a scan line,

wherein a drain of the selection transistor is electrically connected to a signal line,

wherein the first driving transistor and the second driving transistor have the same conductivity type,

wherein a leakage current of the first transistor is less than or equal to 1×10 −20 A at a temperature of 25° C., and

wherein a capacitance of the capacitor is less than or equal to 1/10 of a capacitance of the display element.

12. The electro-optical display device according to claim 11 , wherein the display element is a liquid crystal display element.

13. The electro-optical display device according to claim 11 , wherein a display mode of the electro-optical display device is in-plane switching.

14. The electro-optical display device according to claim 11 , wherein a display mode of the electro-optical display device is fringe field switching.

15. The electro-optical display device according to claim 1 , further comprising a driver circuit for driving the pixel, wherein the driver circuit comprises a fourth transistor including polycrystalline silicon.

16. The electro-optical display device according to claim 7 , further comprising a driver circuit for driving the pixel, wherein the driver circuit comprises a fourth transistor including polycrystalline silicon.

17. The electro-optical display device according to claim 11 , further comprising a driver circuit for driving the pixel, wherein the driver circuit comprises a fourth transistor including polycrystalline silicon.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2011
From: TAKEMURA, YASUHIKO
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 026226/0041 →
Priority Claims (1)
JP 2010-109827 · May 12, 2010 · national
Continuity (1)
Related Publication 20110279419A1 · Nov 17, 2011